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<?xml-stylesheet type="text/xsl" href="https://e2e.ti.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Amplifiers</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/</link><description>Find answers, share knowledge, solve problems with fellow engineers.</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><item><title>Forum Post: OPA814: simulate gain stability for ninv opamp</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649573/opa814-simulate-gain-stability-for-ninv-opamp</link><pubDate>Tue, 26 May 2026 19:16:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:f0bd1a43-82ec-4af4-a1c1-203920c54e5e</guid><dc:creator>Dennis Brown</dc:creator><description>Part Number: OPA814 I have a design that uses the OPA814 configured as a unity gain buffer but it wants to oscillate when the feedback resistor is a 0 ohm short (the other resistor to ground being an open). It will stop oscillating once a 50ohm resistor is installed in the feedback. Seems there is limited phase margin here but I would like to know more about the analysis from tina. In tina, how does one simulate open loop stability or closed loop stability for an opamp configured in a noninverting format? Would like to see gain (dB) and phase margin (deg). Closed loop gain/phase is easier as this is what is in my tina file attached. There is nothing obviously wrong in closed loop format here to me. There are a couple videos on the TI website that show similar concepts but not necessarily like this problem. If you have a link to something similar please post it. For the record the attached file does not show any sort of oscillation but I just want to know how to extract out gain/phase information under AC analysis so I have a better grasp on the problem. OPA814_TINA_stability.TSC</description><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/OPA814">OPA814</category></item><item><title>Forum Post: TLV9001: Pinout TLV9001IDCKR in SC70-5 package</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649567/tlv9001-pinout-tlv9001idckr-in-sc70-5-package</link><pubDate>Tue, 26 May 2026 18:53:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:5dbfb2cc-f4bd-4ee6-8b75-0cfb69e4ab04</guid><dc:creator>Michael Gendelsman</dc:creator><description>Part Number: TLV9001 I need pinout of TLV9001IDCKR in SC70-5 package.</description><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/TLV9001">TLV9001</category></item><item><title>Forum Post: TAS2505EVM: Noise on TAS2505EVM board at 16kHz WCLK and external Master</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649566/tas2505evm-noise-on-tas2505evm-board-at-16khz-wclk-and-external-master</link><pubDate>Tue, 26 May 2026 18:39:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:a026914c-8486-4955-b680-3297eda89b67</guid><dc:creator>Danilo A.</dc:creator><description>Part Number: TAS2505EVM Other Parts Discussed in Thread: TAS2505 Hi Team, Posting on behalf of our customer. I&amp;#39;ll share this E2E post with our customer so he can reply when needed. I am currently working on I2S communication between an EFR32 device and the TAS2505 EVM board, and I encountered an issue when using a 16kHz sample rate. As I understand, WCLK should be equal to the sample rate. In my case: WCLK = 16kHz Word length = 16 bits Stereo audio Therefore BCLK = 512kHz The issue is that the audio output from the TAS2505 speaker contains noticeable noise/distortion (“buzzing” or “crackling”) when operating at 16kHz. However, when I increase the sample rate to 44.1kHz or 48kHz, the audio becomes much cleaner, which seems expected. What is strange is that with exactly the same firmware, same audio data, and same 16kHz configuration, another DAC/amplifier (MAX98357A) produces very clean and clear audio output. So I would like to confirm a few things: Could this issue be related to differences in the hardware architecture/design between TAS2505 and MAX98357A? Is it expected that the TAS2505 EVM board may produce more audible noise or degraded audio quality when operating at 16kHz sample rate? The TAS2505 EVM board includes the TAS1020B onboard USB interface, which seems to run with a default 48kHz audio configuration. Is there any application, firmware tool, or method available to modify the TAS1020B firmware/configuration so that the board can operate with 16kHz WCLK instead of the default 48kHz? I would like to test whether the issue is related to clock synchronization or USB audio configuration. Additional information: I configure the TAS2505 EVM through the CodecControl application. My configuration script is similar to the Class-D example script. I only changed the divider settings: NDAC = 1, MDAC = 6 or NDAC = 2, MDAC = 3 Regards, Danilo</description><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/TAS2505">TAS2505</category><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/Home%2btheater%2b_2600_amp_3B00_%2bentertainment">Home theater &amp;amp; entertainment</category><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/TAS2505EVM">TAS2505EVM</category></item><item><title>Forum Post: RE: INA849: Analog potentiometer to control gain</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649313/ina849-analog-potentiometer-to-control-gain/6359204</link><pubDate>Tue, 26 May 2026 18:30:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:670692af-c672-4483-ac18-a18ed0b9c3d2</guid><dc:creator>Robert Clifton56</dc:creator><description>Hi Alvaro, I have a few questions. Is a manual (where someone manually adjusts it) potentiometer acceptable? Was there a reason that you wanted to use a potentiometer rather than using a programmable gain amplifier? Best Regards, Robert Clifton</description></item><item><title>Forum Post: RE: TLV9022L: TLV9022L Pspice lib file simulation error</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1648458/tlv9022l-tlv9022l-pspice-lib-file-simulation-error/6359142</link><pubDate>Tue, 26 May 2026 17:47:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:4e1d9ea4-d30c-4b4b-971a-5d7e7f98efd4</guid><dc:creator>Marek Lis</dc:creator><description>done</description></item><item><title>Forum Post: RE: LM111: Date code decode</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1648830/lm111-date-code-decode/6359124</link><pubDate>Tue, 26 May 2026 17:41:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:a3af2f38-f732-4284-9de2-48f3402e74d4</guid><dc:creator>Paul Grohe</dc:creator><description>Ron, MD8 is Military (883) bare die. In our systems it would be looked-up as LM111-MD8 (dash instead of space). Karthik, 42AHS91 This is a valid lot from Feb 24th 20204 from the Philippines test site. The &amp;quot;42&amp;quot; is the last digit of the year (4) and the month (2=Feb). AHS9 is an internal lot trace code and has no meanings outside of TI. Nothing to &amp;quot;decode&amp;quot;. The &amp;quot;1&amp;quot; is the assembly site code (1 = Clark A/T). The die is the ex-National Semiconductor die.</description></item><item><title>Forum Post: RE: TLV3901: Question Regarding TLV3901 Latch Functionality and TINA Model Behavior</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649494/tlv3901-question-regarding-tlv3901-latch-functionality-and-tina-model-behavior/6359111</link><pubDate>Tue, 26 May 2026 17:33:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:75558223-5f88-4b03-9a62-7f1fa533f4e7</guid><dc:creator>HO SIU</dc:creator><description>Hi Hadi, You are correct. There is currently an error in the model where the internal 50Ω pull up to VCCO are not implemented. This will be fixed in the next iteration of the model. For the resistor to GND on the LE pin, it depends on your VCCO. If you&amp;#39;re using a 3.3V VCCO, the 500Ω resistor should apply a -300mV differential between LE and LEB so this should be valid configuration.</description></item><item><title>Forum Post: RE: TLV3901: Clarification Request on TLV3901 CML Output Termination Requirements</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1648642/tlv3901-clarification-request-on-tlv3901-cml-output-termination-requirements/6359094</link><pubDate>Tue, 26 May 2026 17:20:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:a5ce452b-1408-438d-a5ae-d35edd7d400c</guid><dc:creator>Paul Grohe</dc:creator><description>Hello Hadi, 1. Yes. There are internal 50 ohm resistors to VCCO inside the TLV3901. These provide the reverse termination for the output. 2. There should be a 50 ohm resistor at each of the inputs *AT* the receiver (FPGA) to the VCCO voltage. See the following application reports on terminations and AC coupling for more information: AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) DC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML Interfacing Between LVPECL, VML, CML and LVDS Levels Comparator Output Types (see section 2.3.4)</description></item><item><title>Forum Post: RE: OPA4323: Power rail is asymmetrical (when using LM7705)</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649306/opa4323-power-rail-is-asymmetrical-when-using-lm7705/6359093</link><pubDate>Tue, 26 May 2026 17:20:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:68d5cd2c-3e89-48af-9d41-e8b7b2d23e2a</guid><dc:creator>Ron Michallick</dc:creator><description>Hello DH, LM7705 clock is 92kHz. I expect some harmonics of that clock will also be in V- supply. What is the bandwidth of these high gain amplifier circuits? Obviously keep that well below 92kHz. Chart is PSRR for negative supply.</description></item><item><title>Forum Post: TLV3605: TLV3605 output asymmetry</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649537/tlv3605-tlv3605-output-asymmetry</link><pubDate>Tue, 26 May 2026 17:17:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:e3a746ff-6f64-4c08-8a84-0bfde5f3fdc7</guid><dc:creator>Charles Gordon</dc:creator><description>Part Number: TLV3605 Hello, I&amp;#39;m using the TLV3605 in an optical receiver, and am seeing asymmetry in the lvds output. In my design, the TLV3605 is driving an FPGA input, connected by a 100 ohm differential coplanar waveguide with 100 ohms receiver termination. I&amp;#39;m probing directly at the output of the comparator w/ a differential probe. The comparator&amp;#39;s 3.3V supply is decoupled similarly to the evaluation board (TLV3605EVM), and the hysteresis is set close to the minimum ~10mV. You can see the asymmetry in the picture below, where the differential output settles to ~275mV on one side, but only ~200mV on the other side. Could you please advise on possible causes of this?</description><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/TLV3605">TLV3605</category><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/TLV3605EVM">TLV3605EVM</category><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/Wireless%2bInfrastructure">Wireless Infrastructure</category></item><item><title>Forum Post: RE: OPA4376-Q1: Amplifier output with high offset</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1648959/opa4376-q1-amplifier-output-with-high-offset/6359076</link><pubDate>Tue, 26 May 2026 17:05:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:0bd0cc6a-b2dd-4623-8642-908431406872</guid><dc:creator>Ron Michallick</dc:creator><description>Hello Tony, [quote userid=&amp;quot;577054&amp;quot; url=&amp;quot;~/support/amplifiers-group/amplifiers/f/amplifiers-forum/1648959/opa4376-q1-amplifier-output-with-high-offset&amp;quot;] measured REF35125 output 1V25 = 1.249V and 500mVin = 0.515V as expected,[/quote] This is not expected for me. With no load of 0.5V, it should be nominally 499.6mV; 515mV is 3.1% high. This error should be understood first. 1.7V is 11% high. Are you certain that all the ground points in this circuit are 0mV? Pick a common ground point then measure the ground side of each resistor that connects to ground. Also check to see if any output oscillates. I do not see the loads, are they capacitive? There are also no capacitors on the feedback resistors, this can erode some phase margin.</description></item><item><title>Forum Post: RE: USB2ANY: The USB2ANY can't detect BQ25798 Battery Charger</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649117/usb2any-the-usb2any-can-t-detect-bq25798-battery-charger/6359073</link><pubDate>Tue, 26 May 2026 17:02:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:1724aaf3-d101-44e3-8e6e-53ca43e7ed92</guid><dc:creator>Jeff F</dc:creator><description>HI Joshua, You may need to update the USB2ANY firmware. Regards, Jeff</description></item><item><title>Forum Post: RE: LM111: Date code decode</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1648830/lm111-date-code-decode/6359040</link><pubDate>Tue, 26 May 2026 16:42:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:a0672c44-92c6-4e88-81ce-29aba61a21c8</guid><dc:creator>Ron Michallick</dc:creator><description>Hello Karthir, LM111 MD8 is not a valid part number. Is it one of these?</description></item><item><title>Forum Post: RE: INA240: INA240 current sensing design</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1644428/ina240-ina240-current-sensing-design/6359026</link><pubDate>Tue, 26 May 2026 16:36:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:05016381-84db-4762-8c8a-d3c9a7e22bc9</guid><dc:creator>Levi DV</dc:creator><description>Hi Luca, The REF1 and REF2 pins are both part of a voltage divider that will average the zero current output voltage, so they are often shorted to the VS pin and GND pin of the INA240 itself for bidirectional operation: If you want to use an external reference to set the reference output to midsupply I would recommend shorting the ref pins to each other and connecting them to the reference voltage. For the REF2033, the VBIAS pin is the correct output since it will output a voltage that is half the supply voltage. I wouldn&amp;#39;t recommend connecting the VREF pin to the 3.3V supply however, since that supply is already driven by another source. Let me know if you have any more questions, Levi DV</description></item><item><title>Forum Post: RE: INA333: Sawtooth waveform</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649486/ina333-sawtooth-waveform/6359014</link><pubDate>Tue, 26 May 2026 16:29:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:b019475a-4dfa-43c5-bbd4-98c8ebb16fa1</guid><dc:creator>Taylor Allan</dc:creator><description>Hi Marvin, I would first check what the inputs of the INA look like to see if they are DC voltages. Also, is the node circled below a correct connection point? One thing that I do notice about this schematic is that the reference is not buffered. If the REF pin of an INA sees a large input impedance, the CMRR of the device can degrade significantly as explained in this section of the datasheet. If there is significant ripple on any of the voltages sources above, you can see ripple on the output, especially VG1 due to CMRR degradation. Could you measure if there is any ripple seen on any voltage sources? Also, if you create a low impedance connection on the REF pin to GND, does the issue persist? Best Regards, Taylor Allan</description></item><item><title>Forum Post: LMH32404: Technical Support Request: Output Oscillation in LMH32404YR-based APD TIA Circuit</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649523/lmh32404-technical-support-request-output-oscillation-in-lmh32404yr-based-apd-tia-circuit</link><pubDate>Tue, 26 May 2026 16:28:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:8d793535-4f7a-4fab-b04c-a250cca2e35f</guid><dc:creator>Jong-sik Shin</dc:creator><description>Part Number: LMH32404 Hello, I am designing a TIA circuit using the LMH32404YR to amplify signals from an Avalanche Photodiode (APD). I am currently encountering an unexpected oscillation issue at the output, and I would appreciate your technical guidance to resolve it. 1. Circuit Configuration TIA: LMH32404YR (4-Channel High-Speed TIA). Input Stage: APD cathode is directly connected to the TIA input pins (IN1–IN4). Bias: APD anode is connected to the high-voltage bias (APD_HV_N). The bias line includes an RC filter (10k ohm + 10nF/100pF). Output Stage: The outputs (AMP_P/N) are connected to an FPGA LVDS input port, and a 100-ohm termination resistor is applied at the FPGA end. 2. Problem Description I am observing high-frequency oscillation at the output (AMP_P/N) even when no input signal is present. The oscillation persists despite keeping the input traces as short as possible in the PCB layout. 3. Questions Input Stability: How does the junction capacitance of the APD, when directly connected to the LMH32404 input, affect the stability of the TIA’s feedback loop? Termination Impact: Does the 100-ohm termination at the FPGA LVDS input interact with the LMH32404 output stage in a way that could induce instability, and is there a specific output matching requirement? Layout and Filtering: Could you recommend PCB layout best practices (specifically for the input traces and grounding) or modifications to the bias filtering to suppress this oscillation? Stability Optimization: Are there any recommended damping components or register/configuration settings for the LMH32404 to ensure stability when driving an FPGA LVDS interface with direct-coupled APD inputs? I have attached the schematic for your reference. Any advice on debugging this oscillation or optimizing the circuit for a stable interface with the FPGA would be greatly appreciated. Thank you for your time and assistance. Best regards,</description><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/LMH32404">LMH32404</category><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/Aerospace%2b_2600_amp_3B00_%2bDefense">Aerospace &amp;amp; Defense</category></item><item><title>Forum Post: RE: USB2ANY: The USB2ANY can't detect BQ25798 Battery Charger</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649117/usb2any-the-usb2any-can-t-detect-bq25798-battery-charger/6358916</link><pubDate>Tue, 26 May 2026 15:48:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:822f5c7c-c3e5-43e0-99ca-5ca277d83c27</guid><dc:creator>Joshua Salinas</dc:creator><description>Hello Rajesh, I will transfer your E2E post to the team responsible for BQ25798. Thanks! Regards, Josh</description></item><item><title>Forum Post: TLV3901: Question Regarding TLV3901 Latch Functionality and TINA Model Behavior</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649494/tlv3901-question-regarding-tlv3901-latch-functionality-and-tina-model-behavior</link><pubDate>Tue, 26 May 2026 15:32:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:d976c435-3898-4b6c-ab0d-2beda2360c02</guid><dc:creator>Hadi Azar</dc:creator><description>Part Number: TLV3901 Question Regarding TLV3901 Latch Functionality and TINA Model Behavior.docx</description><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/TLV3901">TLV3901</category><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/Data%2bcenter%2b_2600_amp_3B00_%2benterprise%2bcomputing">Data center &amp;amp; enterprise computing</category></item><item><title>Forum Post: INA333: Sawtooth waveform</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1649486/ina333-sawtooth-waveform</link><pubDate>Tue, 26 May 2026 15:25:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:08a60e51-46ff-4cb2-96ba-195b752f9ea7</guid><dc:creator>Marvn Arcangel</dc:creator><description>Part Number: INA333 Hi experts, Need advice on this one. The simulation shows straight line but when the circuit was built, the output showed a sawtooth waveform instead. What could be the issue? More information: 1. The oscilloscope probe I used is standard lenght. 2. There are no long wires between the output point and the measurement terminal; the oscilloscope probe is connected to the output point via a 5 cm wire. Regards, Marvin</description><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/INA333">INA333</category><category domain="https://e2e.ti.com/support/amplifiers-group/amplifiers/tags/Test%2b_2600_amp_3B00_%2bMeasurement">Test &amp;amp; Measurement</category></item><item><title>Forum Post: RE: THS3491: output can not reach 5.5V beyond 300Mhz</title><link>https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1648189/ths3491-output-can-not-reach-5-5v-beyond-300mhz/6358852</link><pubDate>Tue, 26 May 2026 15:17:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:e0894662-737c-407e-9701-607ea2307275</guid><dc:creator>Ignacio Vazquez Lam1</dc:creator><description>Hi, Can you confirm if this measurement is being done without any sort of load at the output. We get around ~500MHz of bandwidth at 5Vpp with this device in a similar supply configuration as the one you mentioned. I am wondering if maybe loading is affecting the measurement. If you probe at the input of the device where the 50ohm termination resistor is placed. Is your input signal the same amplitude up to the frequencies of interest? Best Regards, Ignacio</description></item></channel></rss>