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TINA/Spice/OPA313: Increase Phase Margin

Part Number: OPA313

Tool/software: TINA-TI or Spice Models

Hello,

I was wondering what ways I could increase my phase margin in the circuit below keeping the same FET (PM is ~27). I know decreasing the gate to source capacitance by picking a different FET helps as does lowering the 1ohm resistor value. I was wondering what other options are available to me? Thank you!

Best,

Adam

  • Hi Adam,

    There are two options. The first is to add an isolation resistor between the output of the amplifier and FET. The second is to use a topology called Riso with dual feedback. Riso with dual feedback will give a more DC accurate solution but may not be needed based on your design requirements.

    The reference design "1% Error, 0-5 V input, 0-500 mA Output, Low-Side Voltage-to-Current (V-I) Converter" discusses adding an isolation resistor to stabilize (increase the phase margin) the amplifier.

    The reference design "High-Side Voltage-to-Current (V-I) Converter" discusses designing with Riso with dual feedback topology.

    Additionally, I recommend watching out TI Precision Lab videos on Op Amp Stability which discuss both the Riso and Riso with dual feedback topologies.

    Thank you,

    Tim Claycomb

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