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LMV321: Power Down Question

Part Number: LMV321

Dear Team,

We had test Op AMP_LMV321IDBVR found one symptom during power down status.

Use below circuit to test output status during power down, found output signal abnormal like below waveform.

Could you help to clarify the problem?

Thank you.

 

  • Jim,

    Output high is a typical characteristic for the LMV321 when VCC is below the specified minimum operating VCC.

    The reason can be seen in the schematic.  The transistors in green require 3*Vbe + 1*Vt volts to operate. When there is not enough voltage to run the transistors in green box then the input and output are no longer connected. The output will default to high. There no power up reset or under voltage lockout in LMV321. 

  • Hi Michallick,

    Thank you for the reply.

    We found that the output voltage is about 50 mV when it is low.

    Could you help to check below questions? Thanks.

    Left figure:

    Arrow 1: Due to 5V supply didn't reach 2.7V, so output voltage was high. When 5V supply becomes larger than 2.7V, then the output will pull to low, am I right?

    Arrow 2:  (a) When the output is low (about 50 mV), could we refer to the maximum output swing (280mV or 400mV) in the datasheet for this voltage? 

           (b) Does 50 mV come from VCE voltage of BJT in OP?

    Right figure is the same as left one with different scale. 

    CH1: Output pin signal.

    Regards,

    Jim

  • JIm,

    1) Yes, that is correct.
    2a) Yes, that is VOL output under load specified in the data sheet.
    2b) The 50mV observed value is VOL without a load. It is not zero because the LMV321 has an internal anti saturation circuit that makes supply current low even during VOL. It prevents too much base current into the NPN sink driver.