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I'm stuck trying to understand a part of this and would appreciate any pointers from you. This is a working circuit and reproduced as it is.
a) The input 1uF capacitor (connected in reverse) - this is a polar cap but am not sure how this configuration works.
b) The 120K resistor and 47uF capacitor in the feedback loop - is that for nulling the offset ?
Thank you and regards
I am going to move your post to our precision amplifier forum.
In the meanwhile, I might suggest you throw this in TINA and run some sims. Do a frequency sweep of the input.
I'd assume the polarity of the 1 uF cap just says the bias of the pre-stage is at a lower voltage than the bias of the input of the op amp.
Gate Driver Applications
Dallas, TX USA
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In reply to Don Dapkus:
Thank you for the reply.
Yes the polarity seems logical considering the bias potential but could it not have been better to have a non-polar capacitor there ?
Let me run a TINA sim and get back.
Im afraid im a newbie to TINA, though i did setup the scene and ran an AC and DC analysis to begin with.
The voltage at points are probably not correct - the midpoint of the resistor divider shows 11.1V whereas it should be 7.5V. I have attached the file here in case it can be opened by others to verify. The opamp used in the original circuit is a JRC4558 ... and the equivalent available with TI is the RC4558 whose supply is lower than the NJR opamp.
Any help is much appreciated.
Soumitra3264.Input Opamp Test.TSC
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