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Part Number: TL082A
Here is a application. A 1200Vdc should be attenuated to signal level and connect DSP A/D terminal. I'm learn the method there are:
1. Using the passive resistor and consist a divided circuit, after series a buffer to DSP,
2. Using differential input for OP ( TL082A, Set Gain 0.002 V/V) and series a buffer to DSP,
3. Using fully-differential amplifiers and series a buffer to DSP
My questions are:
1. Weather have more solution for High voltage attenuator, how about each of solutions pros and cons?
2. For cost concern, I'm try to use solution 2 (TL082A, ). Can you advice It's a good option or not? What key parameters I should take care? How to estimate the amplifier stable?
3. Which topology are best solution for high high voltage input? Can I have the details and reasons? Tks.
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In reply to kai klaas69:
Tks for your noted, there is a ripple voltage on DC bus voltage, the frequency around 3-8Khz. Here's power part block diagram for reference.
In reply to Paul Goedeke:
Hi Kai and Paul,
Very well, will have that in mind. In application, there is no large capacitance load on Amplifier output.
Here is the draft schematic, pls feel free and comments.
In reply to Xiaobing (Eric):
I threw this circuit into TINA for you to play with. It looks okay to me, the way you have the large resistors makes R1 and R5 sort of irrelevant, the gain is basically 27k/6.12Meg.
Can you explain why you have a voltage divider on the output? Why not just choose the gain properly have the right output voltage from the op-amp?
Given this configuration, the considerations laid out in first link of my previous post are very important.
Tks for your comments. This circuit have been widely applied in industrial. The voltage divider is not populated in schematic, it's a placeholder. I just have one more concerns, this circuit Gain is below 1, how to estimate its magnitude margin and phase margin?
2nd questions, there're voltage sense board failure in customer. As checked the TL082 have low resistance (320R) between negative power (4 pin) and non-inverting input (5 pin). Can you do some comments for possible cause? The circuit show as following:
Plus, do you have any suggestion for EMI, RFI and protection of Amplifier? Doc. are welcome.
Tks for your doc, I am enjoying...
Also for failure analysis, Do you suspect the noise signal inject from OP output side ( R1, 100R)? I'm thinking what's is possible noise route in following block diagram? Can you show me on following diagram? More thanks.
2. the voltage attenuator's Gain is below 1, how to estimate its magnitude margin and phase margin? Pls comments.
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