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  • TI Thinks Resolved

Problems using OPA656 for Noise measurements

Prodigy 20 points

Replies: 3

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Hi,

I am using OPA656 to measure the power spectral density of the gate current of 745 pA.

I am using a VI on labview for the noise spectral density measurements. Please find attached the Sv obtained on the ouput of the amplifier. (The front panel of my labview).

The gate bias of -3V is on the non-inverting input of the amplifier (with a socket specially for this). Please see the figure below.

The gate of the transistor is connected to the inverting input of the amplifier.

The feedback resistor is of R6=1 kOhm on the backside of DEM-OPA-SO-1A.

Can you identify the problem ?

What is the minimum current that can be measured with the OPA656 operating at +/- 5V with 2 voltage dividers ? Is it of 2 pA as mentioned in the datasheet ?

Thank you for your answers,

Kind regards,

   

  • Hello Serge,

    Do you have a diagram of your system?

    Also what is the black wire connected to?

    You might be losing the sensitivity of your system because of noise coupled in on unsheilded wires such as the black wire. It looks like you might have done so already but I would recommend twisting the power wires together to help improve noise immunity on the power lines.

    Ryan
     

  • In reply to Ryan May:

    Hi Ryan and Serge,

    From the description, I'm gathering that the black wire is the input which is tied to the inverting input of OPA656 and the Gate of a JFET or MOSFET? I'm also presuming that the issue in question is the splattering of the waveform.

    If so, it may be that the capacitance on the OPA656 (configured as a TIA) inverting input, is causing loop instability. In most cases, a small capacitor (CF) across the feedback is the remedy to stabilize the loop. Equation 8 in the LMH6629 datasheet shows the optimum value of CF:

    GBWP = 230MHz for OPA656

    RF= 1kohm (in this case)

    Assuming CIN (CM cap + Diff Cap + any additional capacitance due to wiring, Gate, etc.) to be around 10pF, then:

    CF= 2.6pF

    A higher Gate / parasitic capacitance will increase the optimum CF.

    May be this value of CF can be tried as a starting point, to see if the plot fuzz can be improved, and then the value later optimized.

     

    Regards,

    Hooman

  • In reply to Hooman Hashemi:

    Hi Ryan and Hooman,

    Thank you for your answers. I actually solved the problem. They were related to earth loops. 

    I will also check with the feedback capacitor and create a diagram for my circuit for upcoming questions.

    Kind regards,

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