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OPA1S2384EVM & SLD-70 BG2A

Other Parts Discussed in Thread: OPA1S2384EVM, OPA1S2384, TINA-TI

Hello,

I have purchased an OPA1S2384EVM recently. Few components are DNP/0Ohms. Could you please suggest optimum R & C values for R1, R2, R6, R7, R9, C1, C2 & C7. The photo diode SLD-70 BG2A (180pF is the junction capacitance) is planned to use with the EVM. Below are the additional details.

  • What is end Application : LiFi
  • What is subsystem part is used on? : Photo Diode SLD-70 BG2A
  • Schematic showing details how part is used : Similar to the example available in SBOA122.pdf page number 7.
  • Part input signals: amplitude, frequency, real world sensor (detailed description) : Light information.
  • Part output load: resistive, capacitive, inductive, dynamic : Data to microcontroller to process it.
  • Power supply (LDO, switching, voltages of power supply) : DC/DC converter
  • Location of part’s power supply bypass capacitors and values : R6, R1, R2, R7, R9, C1, C2 & C7.

Thanks and Regards

N Pal

  • Hello N Pal,

    The default configuration of the OPA1S2384EVM is for a non-inverting gain of 1 configuration. The DNP components are there to enable a variety of inverting and non-inverting configurations, so not all components will need to be populated.

    Thank you for including the photodiode part number and its specified junction capacitance. However, to make accurate recommendations for the components I also require the following information:

    • expected range of the photodiode output current in your application
    • desired output voltage of the transimpedance amplifier
    • desired signal bandwidth of the system

    Best regards,

    Ian Williams
    Linear Applications Engineer
    Precision Analog - Op Amps

  • Hello Ian Williams,

    Thank you for your post. Please find below my reply to your queries:

    Expected range of the photodiode output current in your application:

    As you can see in the data sheet, 100nA(Dark current) to 55uA(SC Current) is the range. But the required range would be 1uA to 40uA. It may be necessary to adjust as per ambient light to get data in a room light. 

    Desired output voltage of the transimpedance amplifier

    5% to 95% of 0 to 5V. i.e 0.25V to 4.75V

    Desired signal bandwidth of the system

    250KHz to 500KHz

    There may be necessity to adjust these parameters during data communication based on ambient, direction, bias voltage etc.

    Kind Regards

    N Pal 

  • Hello N Pal,

    I have a couple more questions before making a full circuit recommendation.

    1. What is the desired sampling frequency of the input waveform? Keep in mind that the OPA1S2384 is designed as a sample-and-hold amplifier circuit.
    2. Because of the desired transfer function of the circuit and the input/output limitations of the amplifier, the circuit will require offset and gain scaling. More amplifier stages will be required to generate stable, buffered reference voltages. Would the customer consider a slightly different output range instead?

    Best regards,

    Ian Williams

  • Hello Ian Williams,

    Please find my reply below:

    What is the desired sampling frequency of the input waveform? Keep in mind that the OPA1S2384 is designed as a sample-and-hold amplifier circuit.

    No limitation. As per sampling theorem, it can be 2times or more. >1MHz or an optimum range.

    Because of the desired transfer function of the circuit and the input/output limitations of the amplifier, the circuit will require offset and gain scaling. More amplifier stages will be required to generate stable, buffered reference voltages. Would the customer consider a slightly different output range instead?

    It is OK. No problem.

    Thanks and Regards

    N Pal 

  • Hello N Pal,

    Here is my initial recommendation: modify the EVM as shown in the image below to achieve the desired transfer characteristic. DNP means "do not populate," or to remove that component.

    The basic idea to my design is to split the necessary gain into two stages to prevent bandwidth limitations, and to manipulate the input and output offset to prevent input and output voltage swing limitations. I've built and tested this circuit in TINA-TI using the OPA1S2384 SPICE model. The simulation schematic is attached below and meets the customer's design requirements. I've also included an AC transfer characteristic and transient analysis showing an example of the track-and-hold behavior.

    TINA simulation schematic: OPA1S2384 Transimpedance_v7.TSC

    As a note, my circuit uses a pedestal voltage of 240mV on the non-inverting input on the first amplifier. This is to prevent cutoff of the first amplifier's output stage when the input current is at its minimum of 1uA. This places a reverse bias on the photodiode, which may help reduce the diode's parasitic capacitance. If the customer does not want this reverse bias present, they may connect both ends of the photodiode to 240mV and the circuit will behave the same way.

    Best regards,

    Ian Williams

  • Hello Ian Williams,

    Thank you for the design. Could you please share me the calculation/formula/method that you followed for each component?.

    Best Regards

    N Palanivel

  • Hello N Pal,

    • R1 = 10k sets the transimpedance gain. Therefore the 1-40uA is converted to 10-400mV. Again, I split the gain into two stages in order to work within the bandwidth limit of the OPA12385 and maintain full control over the offset characteristic.
    • C1 = 6.8pF compensates the closed-loop response of amplifier A by placing a pole at 2.3 MHz, far enough above the signal bandwidth to prevent attenuation.
    • The pedestal voltage of +240mV is added to the non-inverting input of amplifier A to create a total output of 251 to 640mV. The pedestal voltage was selected to ensure that the minimum output never falls below the minimum linear output voltage swing range.
    • C12 = 100pF is chosen based on simulation tests with a 10 MHz switching characteristic. For slower switching, C12 should be increased (up to 470pF or 680pF maximum).
    • R3 = 120 is selected according to Figure 12 of the OPA1S2384 data sheet, recommended Rs vs. capacitive load. This resistance helps isolate the output of amplifier A from the load capacitance to ensure stability.
    • R2 = 1k, R7 = 100, R14 = 1.9k, and TP7 (reference) voltage = 5V were calculated according to a method used to achieve a certain gain and offset with superposition. I've scanned my calculations for your review.

    Design Notes.pdf

    Best regards,

    Ian Williams

  • Hello Ian Williams,

    Thank you for details. The HW is modified as per the new design and the outputs are with DC level shifted to 4.5V at Out B (270mV DC level shift at Out A). Scenario: 500KHz square wave driving LED modules kept 1 feet away from the photo diode. Do you have any comments for the DC level shifts?. 

    Three items needs correction:

    1. Pin# 10 of the schematics need to be connected to +5V or Square input to J4.

    2. J7 & J6 need to short circuited for single supply. 

    3. The "Track and hold behaviour" image in the simulation file (.TSC) looks good, but the .TSC file you sent, is with triangular waveform at the input and the switch is biased with fixed DC 5V. Could you please share me the file with sine input and 10MHz for SW control?.

    Best Regards

    N Palanivel    

  • Hello Again,

    Simulations result is good for the following spice model. But in the practical readings, there is a DC level shift and it is shown below(oscilloscope image).

    CH-1: Function generator input to LED module. CH-2: Out-A, CH-4: Out-B.

    Out A & B- both are having DC level shift. How to overcome this?. A comparator is required in the next stage?. Pls suggest.  

  • Hello N Pal,

    First, here is an updated TINA-TI schematic with the proper switch and input sources:OPA1S2384 Transimpedance_rev A_v7.TSC

    Second, with the component values and voltages as shown in your schematic, the circuit behavior will not be the same as the one I provided. With a supply voltage of 5.5V and the resistor divider values given, the input pedestal voltage is higher and the offset cancellation voltage on the inverting pin of the second amplifier is also higher. I recommend re-calculating the appropriate values for R3, R4, R5, R7, and R8 for 5.5V input based on my design notes. 

    Third, I would recommend first testing the EVM with the SC input held high to remove the high-frequency switching as a variable. It looks like the output common-mode voltage of around 250mV on Out_A and 2.5V on Out_B are fairly close, but the input signal amplitude is small. Can you verify the photodiode current amplitude?

    Best regards,

    Ian Williams

  • Hello Ian Williams,

    Thank you for the schematics.

    It is OK to work with 5V DC and hence I am retaining same values that you have calculated. Mounted all the calculated values now.

    I am getting full voltage for short circuiting the photodiode pins i.e 4.75Vapp.

    The photodiode current varies from 1uA to 4.6uA for the current setup. Hope we need to consider 0.1uA to 5uA as the PD current instead of 1uA to 40uA. Please suggest. 

    Best Regards

    N Pal 

  • Hello N Pal,

    In that case, simply change the transimpedance gain setting resistor to 80k and the compensation capacitor to 2.2pF. I've updated the TINA-TI schematics below.

    OPA1S2384 Transimpedance_rev B_v7.TSC

    Best regards,

    Ian Williams

  • Hello Ian Williams,

    Thank you for the support & sorry for the delay. The dark current of the existing PD is high and hence I have purchased another diode that has dark current almost 0. The application works well now. But due to ambient light/noise, the DC level varies along with data at pin#1. So it is necessary to block the DC from Pin#1 to Pin#2. As Pin#1 & 2's tracks are shorted internally, I could not introduce capacitor in the OPA1S2384EVM.

    Data from Pin#1 has been connected to another comparator (different board). Ambient light is not affecting the DC level.

    I have following queries with you now.

    1. Can I have the gerber file of OPA1S2384EVM?. So that I can introduce a capacitor from Pin#1 to 2. If gerber cannot be shared, pls suggest anyother TI board to solve the purpose.

    2. What should be the capacitor value for 500KHz data & type of capacitor (electrolytic/tantalum/ceramic..etc)?

    3. How to check the stability of the schematics?. Pls refer some TI materials.

    Thanks and Regards

    N Pal