Hi Team,
The customer is using TL026. The VCC+ pin(6 pin) is 12V. The VCC pin (3 pin) is GND.
Now the customer cannot provide the schematic for me. Once he provides the schematic for me, I will upload.
His design is like this:
(1) . A 6V bias voltage are input to both the IN+ pin and the IN- pin. And Another 200KHZ,30mVpp sine wave is input to the IN- pin at the same time.
(2). Then the customer tests the REF OUT pin voltage. It is about 7.31V. And this voltage remains the same.
(3). After the customer inputs the different voltage values to the AGC pin, then he tests the OUT- pin voltage. Please check the below informatio:
The AGC pin voltage value The Vpeak voltage of the OUT- pin
0~7.26V 668mV
7.26V~7.428V FROM 668mV TO 38.8mV
7.452V~7.637V FROM 51mV TO 207mV
7.6387V~7.855V FROM 207mV TO 68mV
>7.855V , the voltage waveform of the OUT- pin is messy.
Q1: When the VCC+ pin(6 pin) is 12V. The VCC pin (3 pin) is GND, what is the voltage range for the REF OUT pin? Is 7.31V OK?
Q2: What is the voltage range for the AGC pin?
Q3: As the datasheet description, when the AGC pin voltage is less the REF OUT pin voltage 180mV, the gain is the max value.
When the AGC pin voltage is higher than the REF OUT pin voltage 180mV, the gain is the min value. Is my understanding correct?
If my understanding is correct, for the customer's issues, why does the voltage of the OUT- pin increase first, then it reduce?
This is not consistent with the datasheet.
Q4: The customer would like to control AGC pin voltage to determine the gain. Is this idea correct?
Best Wishes,
Mickey Zhang
Asia Customer Support Center
Texas Instruments