OPA2132: OFFSET OPA2132U

DRUILHE,

Is the input offset voltage changing by more than 0.5uV or 0.5mV?

Please show the schematic of the circuit configuration you use to measure the input voltage offset.  You may not directly measure Vos with a multimeter because of  the meter's finite input impedance (1-10M) which may effect the measurement.

You must use Insert/Attach  File link to insert  the file.

What are the supplies, input common-mode voltage, resistor values, etc. In short, instead of describing the circuit, please show your schematic even if it's drawn by hand - picture is worth thousand words.

Schéma.docxSupplies +/-15V

See attached file

Hello,
R19=R20 = 10K 0.02% VSRJ10K000
R635 = 4.75K 0.1% R0805
It's not a problem of gain.

I am not clear how do you change the gain from +1 to -1?  Is the voltage on pin 1 of IC96 always ~0.19937V and you use IC82 to switch it between the gains?  If it's so, I don't understand why you show on the non-inerting input of IC92 (pin 6) 0V for gain 1 and 0.19936 for gain -1?  If anything, it should be opposite of what you show.  Also, to truly measure the input voltage offset, you must apply zero input (instead of 0.19937V) to both input terminals at measure the output.

All in all, I am convinced that the error comes from the system setup and not change in OPA132 offset voltage.  If you want to confirm this, please remove OPA2132 from the board and with +/-15V supplies measure the output (Vos) in a buffer or higher gain with the input grounded - see below.

You forget an important point in your analysis. I hope that with this scheme the situation is clearer.
The DG441 represents the switch by configuration of the switch the gain  change of 1 or -1
See attached file

PGA Problème _offset_VXI_ H447.pdf

The inverting and non-inverting configurations ideal output voltage would be -Vdac and Vdac, respectively, but in reality must include the error due to Vos and gain error  due to mismatch of the resistors - see below text in red below.  Also, R||R equivalent resistor works to cancel the error due to IB ONLY in bipolar transistor input differential pair where input bias current has the same polarity.  Since OPA2132 uses JFET input transistors where input bias may have opposite polarity, including R||R resistor in series with the positve input terminal may double the error caused by IB instead of cancelling it - please remove it.

Additionally, OPA2132 typical Vos is 0.5mV but the maximum  is +/-2mV, which together with gain error would account for the difference of 0.20145-0.19721 = 4.24mV you see.