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Part Number: LMH2832
Dear TI Support, Please refer to the LMH2832 specification page 22, "Programming (continued)", Figures 45. SPI Write Bus Cycle Timing Diagram and Figure 46.SPI Read Bus Cycle Timing Diagram. How can writing to an SPI register be avoided when doing an SPI read shown in Figure 46., whatever the SDI (data in) signal has for its last 8 (data) bits, whether tri-stated or not, will be written into the addressed register targeted for a read on the 16th rising edge of SCLK, there is no protocol or signal to indicate a read rather than a write is in progress? In the Figure 46.SPI Read Bus Cycle Timing Diagram, what does the arrow from SCLK 2 to 1 mean? And what does the arrow from SCLK to SDI mean? How can an LMH2832 SPI register be read without being written?
Thank You Chris Raynolds
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In reply to Hasan Babiker31:
Thank You Hasan for taking the time to direct me in what I should have recognized.
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