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INA225: Output truncation when measuring current

Prodigy 40 points

Replies: 8

Views: 145

Part Number: INA225

Hi all,

 

I tried to measure the current pass through R1 with INA225, and the simulation schematics is on the left while the VG waveform is on the right.

However, the result of VOUT is shown as following:

It supposed to be a 3ms-width pulse but turned out to be about only 1ms.

Somehow the pulse was truncated.

I have also set the REF pin to VS/2, and the output was normal (3ms, both sides swing).

I knew I would only get the positive swing when REF is grounded, but I wonder why the resulting pulse is 1ms only rather than 3ms?

Also, the output value did not return to zero (with several milivolts) after the pulse. Why?

  • Hello William,

    Thanks for your question and welcome to the E2E forum! I'd be happy to help you debug this behavior with the INA225 model. Can you please upload your TINA schematic (.TSC file) for me to review?

    Best regards,

    Ian Williams
    Applications Manager
    Current Sensing

  • In reply to Ian Williams:

    Hi William,

    I have some feedback based on what I've seen in your post.

    1. There's no connection to GND in your input circuit. With a floating input, the device doesn't have a reference for the input signal and will not produce a predictable output.
    2. You have a bidirectional input (both positive and negative), but your REF pin is tied to GND. You will only see a meaningful output with positive input in this case, as the negative input will saturate the amplifier output near 0V. If you wish to measure a bidirectional input, you should connect a non-zero voltage to REF, such as VS/2. This will center the output at VS/2 when there's no input signal.
    3. The definition of your PWL input signal has some problems. For example, you define a point of (3m, 3), then (3m, 0). There needs to be some non-zero time difference between points so SPICE can interpret the transient behavior.

    I've attached a TINA schematic for you to use as a starting point. The issues I identified have been corrected, and the circuit gives Vout = 0.5V to 4.5V for I_LOAD = -3A to +3A.

    INA225 Test Circuit_iw.TSC

    Best regards,

    Ian Williams

  • In reply to Ian Williams:

    Hi Ian,

    Thank you for the reply!

    I have modified my schematic based on your suggestions and the circuit worked fine as prediction.

    But there is still a question I'd like to ask, please see the attachment for my schematics.

    I kept the REF connected to ground for some reason. 

    The outputs are correct for the positive inputs.

    However, the output would be a high positive voltage about 2.5V when the input is negative, which I thought that the output would be zero.

    Could you explain this anomaly? Or how does INA225 behave when the negative input saturates?

    Thank you!

    Regards,

    William

    Re_CBoard.TSC

  • In reply to William Chang1:

    Hi William,

    I understand why you think the output would be 0V for a negative input in this configuration. However, there is one limitation of the INA happening here which you may not have considered - the minimum input common-mode voltage (Vcm). 

    In your test, Vcm swings from +3V to -3V. The absolute maximum Vcm for INA225 is -0.3V, meaning any more negative voltage than this will damage the device. The model is designed to alert you when Vcm is violated by making the output change to an unexpected value.

    In the DC transfer test below, you can see that VOUT jumps to 2.49V when Vcm goes below -0.3V and the ABS MAX is violated. 

    Is this +/-3V the true input condition you expect in your system? What we more commonly see is Vcm set to the fixed system bus voltage, like +5V or +12V, while the current changes based on the system load.

    Re_CBoard_iw.TSC

    Best regards,

    Ian Williams

  • In reply to Ian Williams:

    Hi Ian,

    Very clear explanation, thank you!

    Excuse me for my last question: 

    If for some reason I can not connect the VG1 source to the ground (i.e. floating, please see the attachment.), 

    the output would be truncated like the result in my first post. 

    Could you explain the result? Thank you!

    Regards,

    William

    Re_CBoard_floating.TSC

  • In reply to William Chang1:

    Hi William,

    Not connecting the input circuitry to GND in some way is not a valid application condition. If there is no DC path to GND provided, then at best the voltages applied to the inputs will cause unpredictable behavior due to the lack of reference. At worst they will damage the device if they float to very high or very low values.

    The output truncation in this SPICE simulation is due to the output swing to GND limit of the INA225. Because of the saturation voltages of the INA225 output transistors, the device can not output a true 0V. Instead there is some minimum Vout based on the gain setting and input voltage. For the INA225 in the gain of 200, that value is GND + 60mV as shown below.

    What the SPICE simulation is doing, since you have provided no DC path to GND at the input, is provide its own high-impedance paths to GND through one of its solver mechanisms called Gmin stepping. This does not mean that the circuit in the real world would behave the same way. I have measured Vsense in your circuit configuration to see what the input and theoretical output would be versus the INA225 output limits.

    As you can see in the plot on the right, the applied input voltage (Vsense) transitions to -16.6nV and -2.68mV. Based on the gain of 200V/V and the Vref = 0V, this would result in a theoretical output of -3.32uV and -536mV. However the INA225 can not output negative voltages with a +5V power supply, so instead we see Vout = 13.3mV and Vout = 207uV.

    Again, this is caused by the output swing limits of the INA225. With the input close to 0V, the model is saying that the lowest the device can output is 13.3mV. With the larger negative input, the output transistors are pushed harder into saturation so Vout is driven closer to 0V. This gives you an idea of what the real device would do at low and negative inputs, but keep in mind that anything between 0V and 60mV is possible based on the spec.

    Re_CBoard_floating_iw.TSC

    Best regards,

    Ian Williams

  • In reply to Ian Williams:

    Hi Ian,

    Thank you for the reply.

    This solved part of my problem. 

    But the other part I want to know is the output behavior after the first cycle (after 10ms). 

    Same as the question of my first post: why did the pulse shrink to 1ms rather than original 3ms?

    And why does its behavior differ from the first cycle?

    Thank you!

    Regards,

    William

  • In reply to William Chang1:

    Hi William,

    You don't have a valid GND connection to your input circuit, so the results are not guaranteed to make sense. Sometimes SPICE can do strange things while trying to solve its system of linear equations.

    If you GND your input circuitry, each cycle will be the same. In the example below I set Vin from 0V to 3V to prevent violating the input Vcm.

    CBoard_GND_iw.TSC

    Best regards,

    Ian Williams