THS4520: Using THS4520 to do a Fully differential op amps as an attenuator

Hello,

Attached below are two TINA files. The first is a recommended design where you will see that C1 & C2 were added for stability purposes. I've also included the file used for measuring the stability of the design. Please let me know if you have any questions. 

user5774301.TSC

user5774301_Stability.TSC

Best,

Hasan Babiker

Hello Hasan,

Thanks for the reply.

I have made my own design by TINA, and attached is the my simulation.

Can you have a look and suggest me how this circuit works? Especially for stability consideration.

What should I need to notice when implement? 

Does it work for my requirement?

Thanks in advance.SE Bipolar Source Using RFRG of FDA as Attenuator_100Vpp to 0.5Vpp.TSC

Thanks for the file, 

an easy way to check stability is a broadband output noise sweep, there is some peaking here, but not very sharp, so very likely stable - since you have noise gain shaped DC wise using the shunt input R, 

You are operating of course with a pretty significant input referred spot noise, here that is, 

Hello,

I am getting around 57 degrees of phase margin. 

UpdatedStability.TSC

Best,

Hasan Babiker

Hi,

If the input signal with DC component, and I add a DC block in front the FDA input.

How can I know the DC value of the input signal? Can I use a subtractor or something else to do?

I update the question as figure and TINA file.

SE Bipolar Source Using RFRG of FDA as Attenuator_100Vpp to 0.5Vpp_Diff to SE_ACDC coupled.TSC

Hello,

Can you clarify what you are trying to achieve? Why add a DC blocking capacitor if you don't want to get rid of your DC signal?

Best,

Hasan Babiker

Hello,

I am sorry for confusing you.

I am doing a project which is a digital oscilloscope that the bandwidth is 60MHz.

Product is still in the concept stage, and I am evaluating the front-end circuit.

Here is the signal chain description: Signal input → Attenuators → Amplifiers → Low pass filter → ADCs → FPGA

The ADC I choose is LTC2145-14, which is a 14-bit, 125Msps A/D converter.

I need to do DC coupling feature, so I have add a DC component in simulation.

The input signal should be +/-50V with DC.

For the amplifier input signal must be within 0.5Vpp.

For now, I would like to use THS4520 as an attenuator for large signal, and I need the attenuation must be variable.

For example, for an input signal is 100Vpp, the attenuator attenuate the signal to 0.5Vpp.

The key point is to do a DC-coupling input.

Could you advise me how to implement the feature?

Thank you very much.

Hello,

I am sorry, I still don't think that I am clear on what you are trying to achieve.

- So what output signal would you like to see from the FDA? What is the final signal you would like to see in VM1?

- Are you basically trying to DC-couple by making one of your amplifier stages a low pass filter? 

- Why would you add a DC blocking cap into the circuit if you are trying to DC couple?

- What issue are you having with your current circuit?

Best,

Hasan Babiker

Hello,

Any updates on this issue?

Best,

Hasan Babiker

Hi,

Sorry for the late.

I am studying with the simulation.

Here is the new schematic.
SE Bipolar Source Using RFRG of FDA as Attenuator_Instrumentation Amp.TSC

The target is to attenuate a large-voltage signal to lower-voltage signal for the input of ADC.

And the differential output need to be a variable level shift.

The signal chain is consist of (1) Attenuator stage, (2) differential to single end stage, (3) level shift, and (4) amplifier.

You can see an instrumentation amplifier is used to (2) and (3).

It is simply to use the symbol 'V7' to generate a level shift or DC offset in 'Vout_amp_diff'.

And here is another idea for implementation. 
The 'Vout_amp_diff' can be adjusted by 'V1'.
TEST-1211.TSC

It can generate a level shift by adding a non-inverting adder in front of output.

1122.TEST-1216.TSC

I am not familiar with OP amps designs, if there are problems or any ideas, please kindly figure it out and correct my schematic.

Thank you.

Hello,

Please check the following and let me know if this works for you.

user5774301_Atten+DC.TSC

You can add a DC differential voltage using V13.

Best,

Hasan Babiker

Hi,

I have done the simulation that can achieve my target, the output signal can be adjusted by V1.

Now I am considering the Gain-bandwidth issue, my requirement is 62.5MHz.

Can you advise me how the circuit work and the noise performance? 

Thanks.

7288.TEST-1216.TSC

Hello,

Also I would not recommend the circuit you have suggested. You are introducing a delay into positive output when adding your offset, which will introduce error into your differential signal. When working with FDAs you want to match both sides of the amplifier as close as possible. 

Some questions I have for you is:

1) What is the range of the offset that you plan on introducing into the device?

2) The circuit you posted has a bandwidth of almost 100MHz, what is your bandwidth issue?

3) What is your desired noise level?

Best,

Hasan Babiker

Hi,

Thanks for your reply.

I think the circuit I posted is not good for my application,

But I still want to know why you said that has almost bandwidth of 100MHz?

The frequency response shows the gain is too sharp for 70MHz.

temp1.TSC