LM358: Pin treatment of non used opamp

Morning Katsu, 

No that is a bad idea, this comes up so often that Bruce Trump treated the topic very well here, 

https://e2e.ti.com/blogs_/archives/b/thesignal/archive/2012/11/27/the-unused-op-amp-what-to-do

hey Ron, 

That is an incredible app note. I think Bruce was commenting originally in the vast sweep of op amps out there that the simpler circuit he showed was usually adequate. Your point is quite valid but I think in a lot of cases there is already some internal series R to the steering diodes that are your apparent concern. Or, some R in series with those diodes in other cases. 

And actually, those diodes are only in place for handling and should play no role once in the board for ESD protection. If your concern of supply sequencing actually smokes those, do we care? Not good practice of course to leave a smoldering spot of ex-diode on the die, so your point is prudent. 

Micheal,

I had and interesting case where the unused op amp broke so badly that the damage affected the used op amp too. Input diode current actives parasitic transistors that can have unexpected results. 

The unused setup (it was amp 2, pins 5,6,7) is far from ideal but who would expect that the input transistors would be toasted. The die damage was extensive.   

After looking at the board layout, I saw that the pin 4 ground and the amplifier input grounds were connected to a common ground that had a "U" shape several inches long. The center of the "U" had high switchings currents. 

So a more accurate schematic is below. The voltage transients between the grounds created very high diode (and parasitic transistor currents) that caused damage that reached the other amplifier. 

Wow Ron, that is an interesting tale of woe, 

So yes I can see how a poor layout along with an erroneous unused op amp connection along with a high dI/dT could pop everything. 

What you showed in that app note was some real good approaches to ensure survival. The question would be if this is always required for all op amps out there. Some, but not all of course, devices includes some internal limiting R's where they can afford for ESD and/or noise reasons to help protect the inputs from things like this. There is no way for the design community to know that - might suggest more detail in newer parts on their input structures from an ESD and limiting R perspective. 

One answer is to not design in parts with unused stages. An interesting aside there, oddly - the space folks prefer quads to have a qualified parts with extra channels if needed. Now there is a spot you want to carefully treat unused channels. 

Also your point about current spikes triggering the absorption device is a nightmare in space. Imagine an under power device that gets triggered by a passing particle - pop, there goes your satellite - I was talking once to a radiation expert from the early days with NASA. Part of the space IC redesign was simply to remove ESD elements. You definitely don't want edge triggered absorbers flying. 

Hi Ron, hi Michael,

I think the best cure against voltage drops across signal ground trace conductances due to fast current pulses is the use of a solid ground plane and shortest connections to this ground plane.

Many designers still think, even today, that a solid ground plane is only necessary for fast circuits. But Ron's story beautifully shows that this is wrong. In the age of cell phone radiation and ESD even the slowliest circuits will profit from using Hf design techniques, for instance by using a solid ground plane. Not the speed of used OPAmps is counting when it comes to layout design, but the speed of EMI. And this reaches up into the GHz range and even beyond.

Kai