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INA821: Impedance matching for both terminals of the amplifier

Part Number: INA821

I am designing the below circuit for measuring the difference between two voltages after amplifying. I have 1KHz filter at inverting input and relay RG for setting gain 1 to calibrate the offset of the opamp. Would the filter at one of the terminals cause any issue? What is the max possible Coff that RG relay can have to minimize the parasitic mismatch between RG terminals?

The layout guidelines of the INA821 mentions this:

Take care to make sure that both input paths are well-matched for source impedance and capacitance to avoid converting common-mode signals into differential signals. Even slight mismatch in parasitic capacitance at the gain setting pins can degrade CMRR over frequency. For example, in applications that implement gain switching using switches or PhotoMOS® relays to change the value of RG, select the component so that the switch capacitance is as small as possible and most importantly so that capacitance mismatch between the RG pins is minimized.

  • Hi Shivangi,

    do you have a high common mode voltage at both inputs which you want to suppress at all?

    Kai

  • Hi Shivangi,

    Thank you for your post. Can you please share:

    • power supply voltage
    • differential input voltage
    • common mode voltage
    • reference voltage
    • desired output voltage

    -Tamara

  • Hi Tamara,

     

    I will be using this circuit for two measurements. Below are the inputs for both the measurement:

     

     

    Measurement 1

    Measurement 2

    Power supply voltage

    +/- 15V

    +/- 15V

    Differential Input voltage

    -5mV to 5.3mV

    3uV (x 1000) to 7.854mV (x 1)

    Common mode voltage

    0.4V to 5.5V

    0.4V to 5.5V

    Reference voltage

    0V

    0V

    Desired output voltage

    -5V to 5V

    3mV to 7.584mV

    Gain

    X1000

    X1000, x1

  • Hi Kai,

    The common mode voltage is in range of 0.4V to 5.5V for my measurement.

  • Hi Shivangi,

    if the frequency range of common mode input voltage is low (<< 100Hz), capacitive mismatch is of rather little importance. Having said this, I would keep the input circuitry at both inputs of an instrumentation amplifier always identical. So, why not adding an identical low pass filter to the +input of INA821? It would provide some protection and reduce EMI.

    Can you tell something about your signals? Where are they coming from? What about their source impedance? What about the signal frequency range? What about the common mode voltage? Is it DC?

    Kai

  • Hi Kai,

    I am using this circuit for two different measurements. In one case, both the DC signals are coming from the LDO device (being tested) and offset between two is measured after amplifying with a gain of 1000. The noise from the device is only a few uVrms. In another measurement, the signal at the inverting terminal is coming from a DAC and LDO is driving a DC signal at the non-inverting terminal. The common-mode voltage is DC in both cases. The source impedance of LDO signals connected to +input and -input of the INA are 22k and 2k respectively.

    I don't have a low pass filter at +input of INA because it's being driven by an internal current source that changes in the order of ten nAs with a supply voltage of LDO. Thus putting a 1KHz filter at +input of INA will take significant time for the voltage to settle when Vin is changed. And I am trying to measure the change in voltage for this signal with Vin, by taking two gained differential readings against the fixed DAC output.

  • Hi Shivangi,

    I think it should work.

    Kai

  • Hi Shivangi,

    Any imbalance in time constant between the two inputs will cause a difference signal to appear at the instrumentation amplifier inputs. This difference in voltage will be amplified and passed on to the next stage in the signal chain as if it were true signal which will be an error. If this is accounted for, then your circuit should work.