OPA2335: Input terminal impedance and capacitance connected to the output

Hi Y.Ottey,

on page 4 of datasheet you see the input bias current versus common mode input voltage:

For the 25°C curve the input bias current changes from about 100pA to 50pA when changing the common mode input voltage from 0V to 3.5V. This gives a input impedance of about R = dU / dI = 3.5V / 50pA = 70GOhm.

Regarding the maximum load capacitance of an OPAmp you should read this document:

1334 Stability 4 - slides.pdf

It says that the overshoot should be no more than about 20% for a minimum stable phase margin of 45°.

On page 6 of datasheet you see the small-signal overshoot versus load capacitance:

So you see that the load capacitance should be under 200pF.

Higher capacitive loads should be isolated from the output of OPAmp by the help of an isolation resistor. But in this case I would recommend to run a phase stability analysis. Watch the TI's stability training dideos to see how this can be done:

Kai

Dear kai

Thank you for your reply.

I understand your opinion.

Regards,

Y.Ottey

Dear TI team,

I have a question for you about the contents described by Mr. kai.

① It is possible to calculate that the input impedance is 70 Gohm, but what is the variation (deviation) in the input impedance?

② There was the following description from kai.

”It says that the overshoot should be no more than about 20% for a minimum stable phase margin of 45°.”
When considering the capacity load of the OPA2355, should I generally consider the above contents?

Please tell us your opinion.

Best Regards,

Y.Ottey

Dear TI team,

I have received a request from one of our customers for a quick response.
I would be happy to answer any additional questions I posted as soon as possible.

Also, regarding output capacitance (CL), if there is a recommended value, I would like to know additional information.

Regards,

Y.Ottey

Hi Y.Ottey,

it's difficult to better help without a schematic and further details?

What input impedance is the customer looking for? And what load capacitance the customer intends to mount?

Kai

Dear kai and TI Team,

Our customer plans to connect the following damping resistor (RL) and load capacitance (CL) to OPA2335.
CL=100Ω
RL=1 μF

In this case, is there a possibility that output oscillation may occur?

Dear TI Team,

I have been asked by our customer to receive a response from a TI engineer on the above.

Could you also tell us about the question you posted earlier?

① It is possible to calculate that the input impedance is 70 Gohm, but what is the variation (deviation) in the input impedance?

② There was the following description from kai.

”It says that the overshoot should be no more than about 20% for a minimum stable phase margin of 45°.”
When considering the capacity load of the OPA2355, should I generally consider the above contents?

Regards,

Y.Ottey

Hi Y.Ottey,

looks stable in the circuits below:

ottey_opa2335.TSC

But take care: The two circuits were chosen by me because you didn't give your schematic.

Kai

Hi Y.Ottey,

as minimum input impedance at 25°C (worst case) I would estimate R = dU / dI = 3.5V / 400pA ~ 10GOhm.

Kai