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DRV8824EVM: DRV8824 EVM test question...

Part Number: DRV8824EVM
Other Parts Discussed in Thread: DRV8824

Dear Sirs,

My customer test EVM to drive EEV and found some questions as below.

1. nENBL control issue: 

    While DRV8824 into disabled mode(nENBL is high), the output pin waveform as below. Is it normal? Will it case any question for control?

2. current regulation issue:

   It seems the current regulation start from 0.188A, and the Max current measured was 0.272A, not up to 0.3A. Is it correct or not?

   My understanding is, once the current up to 0.3A(current chopping threshold), current regulation will start, is it right?

3. Decay mode issue:

    Is the PWm frequency is 16KHz as below photo item1?

    What is the reason of the waveform of item2? Is it correct or not?

The detail issue description is in attached file.

Please help!

Thanks. 

DRV8824-Q1實測問題點.xlsx

  • Peter,

    1. After nENBL signal is high, all the FETs are off. But, the AOUT2 and BOUT2 could be pushed to high due to winding current keeps the same direction and goes through the body diode of AOUT2 or BOUT2's high side FETs. AOUT2 and BOUT2 are pushed to high until the winding current is zero. We can monitor the winding current and understand it more.

    2. a. Do you set the full step operating? MODE2=MODE1=MODE0=0. If that is the case, the peak current would be 71% IFS setting.

    b. Also, 0.3A is about 18.75% of the IC's 1.6A full scale. So, I would think the tolerance of the output current would be +/-15%.

    c. "My understanding is, once the current up to the current chopping threshold, current regulation will start" Yes. I think so. But, you saw 0.188A was the first chopping point. I don't fully understand. But, I would the internal reference is switched from negative to positive that may cause the current regulation point soft.

    3. Before the reference is stable, we cannot count the PWM frequency. From the waveform we see the chopping current level goes up. That tells me the reference is increasing. So, we cannot count the PWM frequency until the internal reference is stable.

  • Dear Wang Li,

    I’m Peter’s client Mr.Chien ,Thanks for your reply.

    2. a. Do you set the full step operating? MODE2=MODE1=MODE0=0. If that is the case, the peak current would be 71% IFS setting.

    Yes, I set the full step mode. If the correct IFS is 0.3*71%=0.213A, why does the current continue to rise after first chopping point as follows.

    b. Also, 0.3A is about 18.75% of the IC's 1.6A full scale. So, I would think the tolerance of the output current would be +/-15%

    Is the tolerance of output current the same as  △Itrip’s tolerance?

    c. "My understanding is, once the current up to the current chopping threshold, current regulation will start" Yes. I think so. But, you saw 0.188A was the first chopping point. I don't fully understand. But, I would the internal reference is switched from negative to positive that may cause the current regulation point soft.

    What does “internal reference” mean? And why would it be switched from negative to positive?

    Is it normal? If it’s not normal, how to avoid the current regulation point being soft?

    Electronic Expansion Valve (EEV) SPEC:

    Drive Voltage: 24V
    Drive Current: 0.3A±0.01A/Phase
    Coil resistance: 9±1Ω
    Drive system: Bipolar constant current drive
    Excitation method: 2-2phase excitation
    Excitation speed: 400 pps
    All pulse: 0~2500 pulse

    Regarding to EEV SPEC, it mentioned that the Drive current is 0.3A±0.01A/Phase, is this achievable? How should I design the IFS?

    Does TI has other Driver IC that can satisfy the EEV SPEC? If yes, please recommend it to me, thanks.

    Best Regards,

  • Chien,

    2.a "why does the current continue to rise after first chopping point as follows."

    Once the current up to the chopping current threshold, the current chopping will start. I would think the internal circuit voltage level is not finalized during the transaction from one step to another step because the chopping threshold curve likes a capacitor charging curve.

    b. "Is the tolerance of output current the same as  △Itrip’s tolerance?"

    Yes.  I think so because they use the same current regulation circuit.
    c. Ccc. cfjasksd

    c. "What does “internal reference” mean? And why would it be switched from negative to positive? Is it normal? If it’s not normal, how to avoid the current regulation point being soft?"

    For each micro stepping, the chopping current threshold would be difference (check datasheet Table 2. Relative Current and Step Directions). A new reference voltage would be sent to the chopping comparator. The negative to positive words confuse you. When the new reference voltage is connected to the chopping comparator, the new voltage may need a time to charge the comparator input pin voltage up. Can we try a micro-stepping setting to see any help?

    "Regarding to EEV SPEC, it mentioned that the Drive current is 0.3A±0.01A/Phase, is this achievable? How should I design the IFS?"

    It is about 3% accuracy at 0.3A. DRV8824 has 5% tolerance, even with full 1.6A setting. DRV8824 cannot meet this requirement. We need find an external current sensing with 3% tolerance device. I don't find it. We may have to lose the spec.