• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 49 subscribers
  • Views 172 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

INA260: The period from normal condition to alert pin's high.

Motoyasu Hattori
Expert 8695 points
Part Number: INA260

Hi,

*1.
On Alert Latch Enable is 0 (Transparent mode), How much cycle does it take from fault clear to ALERT transition (Low to High)?   Please advise us.

*2.
On Alert Latch Enable is 1(Enable), How much cycle does it take from Register Read to ALERT transition (Low to High), during Fault status is cleared?

If Fault status is still alert situation, Does ALERT pin keep Low after reading register?

Please advise us.

Thanks and best regards,
M.HATTORI.

  • 0
    TI__Mastermind 26750 points
    1. Once the real fault condition stops, the ALERT will turn off (go HIGH) after the next time the ALERT condition is checked. The ALERT condition is checked following every bus voltage and load current conversion. You can use this figure in the datasheet to visualize this.

    2. Once the real fault condition stops and the ALERT is compared to the register of concern, the ALERT will turn off (go HIGH) almost instantly, specifically a cycle or two of the internal 500 kHz clock, so a few microseconds.

    If the fault status is still alert situation (real fault present), then the ALERT pin will remain low if system is in latch mode.

    Best,

    Peter