This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV9064: Input offset voltage

Part Number: TLV9064

Hello Sir

While using TLV9064, we found input offset voltage issue, is there any suggestion for eliminate this offset voltage? Please advise

Yihung

  • Former Member
    0 Former Member

    Hello Yihung,

    Thank you for your question.  Can you please describe your issue?  Any schematics and results will help.

    Depending on the problem, it may be made worse by the application and can be fixed.  You may also choose to select a part with a lower offset voltage for a more precise result.  Please note that all devices will have some offset voltage and some input bias current.  But, this should be in accordance with data sheet specifications.

    Regards,

    Daniel

  • Daniel

    Here is our reference circuit.

    If we would like to turn off NPN, we will set Vset to 0 voltage. When we do this, we sitll find some small leakage current pass through NPN. We have measure OP's output pin. it is around 0.6V.

    Yihung

    How does this constant current sink actually work? - Electrical ...

  • Former Member
    0 Former Member in reply to user4134045

    Hello Yihung,

    How large are i_set and R_set?  Also, how large is the voltage at the In- pin?

    I think even a very small voltage at the input pins will make the NPN transistor turn on and begin emitting a bit of current.  To keep the NPN totally off, you may have to really get the inputs down to 0 volts.

    How do you set V_set to 0? Do you use a voltage source?  I would recommend trying to ground the V_set node to see if that works.

    Regards,

    Daniel

  • Daniel

    Iset is around 400mA, Rset is around 1 ohm, turn on time is around 100uS, Inverter pin voltage is around 0.4V.

    OP Vcc votlage is 3.3V.

    We will have a PMOSFET as power source switch. its voltage is 3.3V. We have 2 resistor and dividend 3.3V to 0.4V for non-inverter pin (Vset). Turn off PMOSFET and let Vset as 0 voltage.

    Yihung

  • Former Member
    0 Former Member in reply to user4134045

    Hello Yihung,

    Thank you for the extra information.  Could you show a schematic of the input?  I just want to make sure I have understood correctly.  Is the non-inverting input tied to GND when the PMOSFET is turned off?

    If not, a good test to run would be to leave the part powered on but ground the non-inverting input.  Then, see whether the NPN keeps trying to turn on.

    Also, for some of these designs I've seen feedback resistors in the design.  I think this helps to protect the input from large currents.  You may want to consider implementing a feedback resistor.  See circuits 36 - 38 of this document.

    Regards,

    Daniel

  • Dainel

    Here is our circuit, can you let me know any concern if  we add that ( red circle area)?

    Yihung

  • Former Member
    0 Former Member in reply to user4134045

    Hello Yihung,

    Doing this would make it harder if not impossible to fully turn off the NPN and would change your region of available operation.  The reason why is because node 1 cannot go to 0V.  If node 1 goes to 0V, that means current has to flow from V_MCU_3V3 through the resistor by node 1.  However, this current will also have to flow through the feedback resistor and Rs, which will mean a voltage drop that prevents node 1 from going to 0.

    I've also made a TINA file to show process.  Here is the circuit.  First, you will see the output current without the extra resistors.  Second, you can see what happens if you have the resistors in place.

    Regards,

    Daniel

  • Daniel

    Do you means if we add node 1 circuit, means TLV9064 pin 2 can't be 0V anymore? right? any side effect of this? Means there is always a 2mV voltage on TLV9064 pin 2, and pin 1 is 0V, any side effect?

    Can you help me to change the resistor value in R1 as 147K, R2 is 100 ohm/ R3 is 1 ohm and do the simulation again for me? Seems the resistor value you put is too large, so when input Vg1 is low than 2.6V, there is no output current.

    Yihung

    Yihung

  • Former Member
    0 Former Member in reply to user4134045

    Hello Yihung,

    I sincerely apologize for the confusion.  I misplaced the current probe and then misinterpreted the results. 

    I re-ran the simulation as before.  This time, I measured the input voltage at the In- pin and at the output pin.  I also measured the load current through the load (R4) rather than through R3.  Now you can see the new results below.

    As you can see, the transistor does fully turn off.  What happens is as follows.  R1, R2, and R3 create a current path to ground.  This leads to a voltage of ~3.3V on the In- pin.  When VG1 < ~3.3V, then the the amplifier acts as a comparator that outputs low, or very nearly 0V.  This goes to the gate of the transistor, which does not turn on.  So, negligible current flows.

    When VG1 > ~3.3V, then the output of the amplifier can rise and turn on the transistor.  This creates a negative feedback path so that the circuit can work as expected.

    Please let me know if this does not make sense.  I have included the TINA file used to run the simulation, in case you would like to tune the values yourself.  I can also run further simulations to decrease R2, if you would like.  I imagine that will be the next step.

    Regards,

    Daniel

    TLV9064_Current_Source.TSC

  • Former Member
    0 Former Member in reply to Former Member

    Hello Yihung,

    I have not heard back from you in a while.  I hope your issue has been sufficiently resolved.

    Please let me know if you need any further help or I will consider the matter to be closed.

    Regards,

    Daniel