Part Number: INA180
My concern is about a glitch that I can observe on the output of INA180A1IDBVR in my resent low side sensing design. The glitch can be seen in the attached captures as a spike on the rising edge of the signal when current encreases from 0Amps.Could you please suggest why glitch occurs and how to fix it?
How are you sensing in this design? From the way you have it set up, it appears you are only sensing one branch of the full bridge here.
There's a few possibilities of what could be occuring here.
First, can you explain the first waveform captured here, and where in the schematic it is? Is the square wave you are measuring the voltage over the INA180, and was this captured at the shunt resistor, or directly at the pins of the device? Also, what variant of INA180 are you using here? Your waveform shows you are allowing almost 200mV of overshoot across the resistor, of which a portion will definitely have a chance to pass through the amplifier if the amplifier cannot reject it via CMRR.
Second, could you probe the IN- pin and GND and post that shot? With such an inrush of current at the startup, its possible that IN- is being pulled slightly below ground and causing non-linear operation.
Regardless of the issue, I think you've identified the culprit. Is it possible to dampen that overshoot at all?
Carolus Andrews, Analog Applications, Current and Hall Effect Sensors
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In reply to Carolus Andrews:
Hi Carolus Andrews,Thank you for your reply.I have updated the picture of the previous post to make it more readable.
In addition, I did a series of tests using ANI181 and INA240 evaluation boards from TI. The waveforms that shown below are the output voltages of the CSAs of the following setups:
a) INA181 when the REF pin is connected to Ground or INA180;b) INA181 when the REF pin is connected to 3.3 mV reference voltage;c) INA240 when the RFE1 and the REF2 pins are connected to Ground.I want to ask if the overshoot, which can be observed on the waveform (a), is the expected behavior when using INA180/181 referenced to GND?
In reply to Andriy Tkachuk:
As I mentioned in my first post, it's possible that with such an inrush of current at the startup, its possible that IN- is being pulled slightly below ground and causing non-linear operation for the first pulse. The fact that this spike is mitigated when you pedestal the output by a few mV seems like strong evidence that this is happening. Could you probe the following during the overshoot event:
1. Differential input of the INA181 (IN+ to IN-)
2. IN- pin to GND
Hi Carolus Andrews,
please see below requested measurements:- Differential input of the INA181 (IN+ to IN-) against the output voltage (the circuit is loaded with a resistive load).- IN- pin to GND against the output voltage (the circuit is loaded with a resistive load).- Differential input of the INA181 (IN+ to IN-) against the output voltage (the circuit is loaded with an inductive load).
In addition, I did the same tests with an H-bridge setup using evaluation boards from TI only (INA180-181EVM and BOOSTXL-DRV8320H), see picture below.
Thanks for the scope shots.
Regarding the output reference mitigating the issue, have a look at this forum post. I think what may be happening is that with the differential measurement being placed so low (below ground according to the screenshots), the device is being placed into saturation, and needs time to recover during the input. When the 3.3mV reference is placed, the output sits above the Vos of the device and is biased into the linear region, and doesn't exhibit this recovery.
A possibility to look at here that could be adding to the issue is potentially the bridge diodes are entering reverse recovery events, as this type of FET with body diodes can exhibit this response. Check out this blog. One thing that stands out is that you are only measuring one side of the bridge Typically, in a switching application such as this, you would implement this one of two ways, either both legs of the bridge would contain current measurement shunts, or the legs would be measured together, like this, and you would receive an average current in the legs (I_meas/n_#_of_legs):
I'm curious if the fact that the ground of the lower right FET is floating by the current*Rsense above the lower left FET is possibly causing issues with either the body diodes of the FETs, or possibly saturating the INA180 as I mentioned above. Is there a way to reconfigure your system to measure both FETs through the same INA181, or to add a second resistance in line with the other FET to check this (I'm thinking this might not be possible since you have unidirectional current flow through the second branch, indicated by the diode in Q2 position).
Regarding the reverse recovery events, if this theory is correct, it might be possible that a FET with a lower drain to source parasitic capacitance might yield a smaller overshoot. As this may not be an option since it looks like you are prototyping with EVMs, perhaps input filter resistors on the INA180 input might be enough to remove it. This is also assuming they don’t have any switch noise somehow coupling to the supply.
there is no inrush of current with the inductor. The current increases slowly from 0A as its rate of change is limited by the inductance. However, you can clearly see the same overshoot at the output of the INA180.
In order to make sure that -IN does not go below GND, please see below the new scope-captures I did today with a calibrated 500MHz oscilloscope.
If you look at Table 3 of the TI document SLYA047, you will find that INA180 Vout enters non-linear regions when the current = 0, which adds output delay time. Thus, I think that INA180 is not recovered after the delay (it needs more time to catch-up), and that overshoot is the side-back of the recovering phase. What do you think?
I definitely agree that the saturation is possibly playing into the response. Last question: what is the voltage being switched over Q4, and how much of that voltage is present on the IN+ line for the inductive load?
I will set up a test in the morning and see if I can replicate this with an INA180 on the bench.
After examining this in the lab, I'm now in agreeance and confident this is a saturation issue.
The INA180 output stage, as in the linked posts above point out , and the resistive load overshoot helps show this.
In the initial photos, the reference voltage supplied to the INA180 is most likely keeping the part above the saturation point, and this is why it helps mitigate the overshoot.
To fully fix the issue, I would recommend setting the INA181 at mid-supply at the bottom of the sources as in the above figure and measuring the load bidirectionally. This gives you a complete picture of the current over the load while satisfying this issue.
Carolus Andrews,Thank you for your support, it is very appreciated.
Unfortunately, using INA181 referenced at mid-supply is not a convenient solution for our application.
We have been thinking about applying a blanking time. Therefore, I would like to ask if that is possible for you to characterize the following parameters of the overshoot:
- the maximum amplitude;- the maximum period/length/time.
Alternatively, could you please suggest a CSA without an overshoot, but in the same price-region?
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