Other Parts Discussed in Thread: LMH6321, THS3491, THS3121, OPA552
Hi,
PL refer the circuit attached.
Here ,Input signal entering from FPGA (sync_vid_1) is 3.3volts pulse. R135 and R146 is DNP. R140 and R139 changed to 10k and 499E respectively. But output is not going more than 7 volts.
There is a requirement of 15 volt signal at SMB connector shown.
AT CRO, with 1 Mohm termination, 24 volts seen but getting reduced to 7 volts when 50 OHM termination added.
PL comment whether below circuit needs any changes.
Seema