Part Number: INA226
I am having trouble clearing latching alerts.
This is how I have my device programmed:
Calibration Register - 0x0831
Configuration Register - 0x4BFF
Alert Limit Register - 0x1F40
Maks/Enable Register - 0x8001
Attempts to clear are below,
Write to Configuration Register
General Call Address - 0x0C
Read Mask/Enable Register
Logic analyzer waveforms show that the SMB Alert General call is what pulls the Alert back up. The other methods work occasionally and overall my ability to clear the Alert is dependent on the value in my configuration register. If the Bus and Shunt Voltage conversion time is set below 8.244ms attempts to clear the Alert can take more than 8 attempts. The data sheet does not show a relation between the value in the configuration register and the ability to clear an Alert.
The post above says to increase the conversion time to catch the flag state but I need to convert at a faster rate.
The waveforms are below.
Above is an Alert cleared by general call.
Above an Alert cleared by reading the Mask/enable register.
Thanks for your post and welcome to the forum.
So you show that you can clear the ALERT signal (active-high) by writing to the Mask/Enable Register. This is how it is described here in the datasheet.
Please correct me if I am misunderstanding.
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In reply to Peter Iliya:
You're right, I worded my problem incorrectly. While those methods do eventually clear the Alert it requires too many mask enable reads and a long conversion time.
Those waveforms are the few times it works correctly. Sometimes I have to repeatedly read the Mask/Enable Register and or do a general call to clear a fault and it gets cleared temporarily as shown by the spikes in Alert signal above. I have made sure to reduce the Current below the value set in the Alert Limit register so that is not the reason Alert is being held low. I also need to do it with a conversion time of less than 8.244ms. Can you help me understand why I need such a long conversion time to reliably clear a fault?
In the waveform above the configuration register is set to 0x47FF. It cleared the fault eventually but I need to complete in at most 2 attempts with a shorter conversion time.
When I reduce the conversion time by setting the configuration register to 0x4DB7 the resulting behavior is shown below.
In reply to Ornella Ngalamulume1:
Thanks for clarifying. You should not need to increase conversion to clear a fault. There could be differential noise getting into the system. I read that you have the Alert limit register set to 8000 dec, which is 20mV for a shunt-over-voltage limit (SOL). In the Mask/Enable register you programmed it for a SOL event and set the ALERT to latch mode.
Please check the shunt voltage register value during this behavior to make sure it is not exceeding the Alert limit register (20mV). Note that the shunt voltage register could be lower than 20mV and ALERT could still trip because device is always comparing the shunt voltage to the threshold after every conversion, not at the end of all of the averages (see Figure 19). So you may also want to set the averages to 1 to make sure that device is not incorrectly tripping when Vshunt < threshold.
I would recommend shorting out the shunt resistor with a low-impedance jumper (if possible) or just turn off the load current. This should stop ALERT from tripping (going low) all together.
If not, try changing the ALERT mode to transparent (Mask/Enable register bit 0 = 0) and start reading back the shunt voltage register data.
I hope this helps.
Thanks for your help. I think one of your suggestions will help resolve my issue.
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