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Only Limit2 pin shows ripples across the threshold-set resistor

Part Number: INA303-Q1
Other Parts Discussed in Thread: INA303

Hello,


We are using the INA303 for short-circuit protection+current sense amplifier.

We are observing a strange phenomenon on the Limit 2 pin of the IC.
There are ripples on this particular pin as opposed to any other pin.
You can refer to the attached oscilloscope snippet.




The probing set-up for the above image is as follows:
Yellow: 5V (Pin no: 1)
Blue: Amplifier output (Pin no: 2)
Magenta: Limit 2 pin (Pin no: 9)
Green: Limit 1 pin (Pin no: 3)

The attached schematic snippet highlights the probes attached with colors on the respective pins and component values



The mathematical details are as follows:


Rshunt: 100uΩ
Sensitivity: 5mV/A (A2 device 50V/V gain)
Limit 1: 316A @ 4.08V. Realized by 51kΩ resistor
Limit 2: -340A @ 0.8V. Realized by 10kΩ resistor
Cdelay: 26.9us. Realized by 100pF capacitor
Reference: 2.5V generated by REF3125AQDBZRQ1

Do you guys have any clues around this issue?
Can you point us to a specific direction to look into?

Thanks!

  • Hello user6272991,

    Thanks for considering to use Texas Instruments.  I need to check with our design team to see if there are conditions in which they would expect that to occur. In the interim, can you tell me whether you have any switching FETs nearby?  If you do and you have a long trace from your 10k to your ground plane, then there might be some of the switching noise coupling on to that trace.

  • Hey Patrick,

    Attaching the layout snippet.

    There is a switching network nearby, however the trace is ~10mils long.

    Also, the reference is more closer to the switching elements, and works perfectly fine.

    The ground between the two are not directly connected, and is stared at a different point.

    The RE from switcher causing issues does not seem likely.

    We tried using a De-Cap for ripple reduction, it works fine, but we do not have a scope of design iteration.

    Please let us know the plausible theories why such a phenomenon could occur and mitigation strategies (one of them being addition of a shunt De-Cap).

    Please confirm.

  • Hello user6272991,

    I spoke with one of our design engineers and he did not think you should see any ripple on that pin.  Consequently, I am going to do some lab tests to see if I can duplicate your results.  If I can, then my team will look further into the design to determine if there is some special operating condition that results in the ripple you see.  Otherwise, if I cannot duplicate it, I think you may need to probe around your board to see what else exhibits that ripple.

    To test your basic setup, I need a few more details that are not clear from your schematic.

    what are the values of R195, R196, R200, R201, R205, C269, and C272.  What does SCD connect to?  When you say decap, are you referring to using the capacitors C16, C266, and C268?  Or do you mean something else?

  • Hey Patrick,

    Thanks for the help, do let us know what you find with your setup.

    Please find my answers to the questions raised by you as follows:

    What are the values of

    R195, R196, R201, R205 - 0Ω

    R200 - 100kΩ

    C269, C272 - 10nF/100V C0G

    What does SCD connect to? 

    SCD connects to a logic gate network, which intends to inform the MCU about the error. The logic gates are powered with the same rail as the INA303.

    When you say decap, are you referring to using the capacitors C16, C266, and C268?  Or do you mean something else?

    I meant a capacitor connected across R214 (value is 1uF/25V X7R), to decouple the ripples in the waveform.

  • Hello user6272991,

    with a stable supply, and vref voltage I have not been able to get the limit 2 pin to exhibit a ripple.  Have you by chance probed around on any of the other device pins?