Electrical Over-Stress, EOS
EOS occurs when excessive voltage or current applied to the terminal(s) of an integrated circuit. In contrast with Electrostatic Discharge (ESD), it is caused by connection to a signal source, load, power supply or other circuitry that creates the voltage/current condition. It is often a more sustained abuse than ESD, though discharge from a capacitor or inductive “kick-back” can have some of the same transient characteristics of ESD.
Though the ESD protection circuitry in an IC is primarily intended to protect against ESD damage, the same circuitry may offer some protection from EOS events. In the simplest form, this protection may be clamp diodes connected from the pin to power supplies or ground terminal. Thoughtful design of external circuitry can greatly improve the tolerance of ICs to EOS events.
Electrostatic Discharge, ESD
ESD is a term used to describe a static electricity discharge applied to the terminals of an integrated circuit. Internal circuitry of an IC can be damaged by discharges of 10V or lower, much below the level that can be felt by human touch. Sensitive circuitry connected to external pins is protected with special internal circuits (ESD cells) designed to absorb or reroute the ESD energy without damage. These circuits vary widely, depending on the IC process type and circuit requirements. Very simple ESD protection may be little more than clamp diodes from the pin to power supplies or ground. Other circuitry is used when the normal operating voltage on the pin may be above or below the power supply voltage.
The ESD ratings of an IC are intended to depict the tolerance to ESD during handling and assembly. Once connected in circuit, tolerance generally increases significantly as series resistance, inductance and capacitance limit and slow the surge of voltage and current from an ESD event.
A Powerpoint presentation on EOS and ESD protection techniques is attached below:
2705.PA-002 ESD_EOS rev_h_090712 (2).pdf
Blog on Electrical Over-Stress (EOS)
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