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DRV8704: Motor controller oscillating at 50 MHz strangely

Jose Pacheco
Prodigy 80 points
Part Number: DRV8704


We have been having some problems with implementing the drv8704 in our dual brush DC motor design. We are part of the Rice Electric Vehicle team here at Rice University, and are preparing to go to competition in two weeks. 

The problem is, that when we accelerate up to a speed, and then choose to decelerate, the entire circuit goes haywire, and begins to oscillate at a very high frequency of 50 MHz. 

After a handful of seconds of operation, the motor driver circuit starts oscillating at about 50 MHz and then the DRV chip goes into a fault state.
We know because we have scoped out the signals from multiple nodes, gates on the high and low side transistors and on the loads. The most recent time we observed this, a couple of FETs and the DRV chip were damaged.

We have a couple of questions and theories about how to fix this. 

1. the ceramic bypass capacitor on the VM pin, not the bulk capacitance:

Under (5) Pin Functions, VM is stated as requiring a 0.1uF bypass capacitor to GND, however, under (8.2) Typical Application, VM is shown as having a 0.01uF bypass capacitor to GND. VM is also shown as having a 0.01uF bypass cap in (10.2) Layout Example. 

I am wondering if this is an error in the datasheet? If so, which is the correct bypass capacitance to use? Does it make a difference? 

2. The filtering on the current sense resistor. We are using a current sense resistor of 10 mOhms, and expect to draw up to 30 amps from each motor, but so far have only tested with a power supply at about 2 Amps. What should the cutoff frequency of the filtering circuit be? Is our current sense resistor large enough to get an appreciable value out of it? 

We are shipping the car out for competition this Tuesday, so getting some feedback soon would be greatly appreciated from our team! 

Thank you, 

Manuel 

I have attached eagle files of our design, and some screenshots of our problem.  

   failure files.zip   Motor control BOM - Stage 3.xlsx

  Thanks!

  • 0
    TI__Genius 14487 points

    Jose,

    I think the capacitor value in the pin functions table may be an error, so I'll make a note to correct that in our next datasheet update. Use a 0.01 uF capacitor. That is the value we use on our EVM. I think the value shouldn't make a huge difference, but the capacitor needs to be as close to the chip as possible to minimize trace inductance. We also recommend using surface mount capacitors to reduce lead inductance.

    Here is a description from the datasheet for designing the filter:

    To accurately detect zero current, an internal offset has been intentionally placed in the zero current detection circuit. If an external filter is placed on the current sense resistor to the xISENN and xISENP pins, symmetry must be maintained. This means that any resistance between the bottom of the RISENSE resistor and xISENN must be matched by the same resistor value (1% tolerance) between the top of the RISENSE resistor and xISENP. Ensure a maximum resistance of 500 Ω. The capacitor value should be chosen such that the RC time constant is between 50 and 60 ns. Any external filtering on these pins is optional and not required for operation.

    When you choose your current sense resistor, be sure that it can handle the (I^2)R power dissipation you anticipate for your largest current.

    I couldn't open your schematic and board files. Could you please share them as PDFs?

    From your scope shots, it looks like you have large negative voltages that may damage the IC and FETs. Do you have bulk capacitors on your FET H-Bridge? Having these should suppress motor and H-bridge transients. The DRV8704EVM shows how to use bulk capacitors on the H-bridge.

    It's also possible that transients/ringing from fast switching of the FETs are coupling across the parasitic capacitance of the FETs. You can reduce this by using lower IDRIVE settings. The FETs will switch slower, but the ringing should be reduced.

  • 0 in reply to James Lockridge19
    Prodigy 40 points
    Hi James,

    We've reduced the effect significantly by setting t_blank to the minimum, previously the register was 0xFF. Additionally, we put an RC low pass filter in series with the analog signal that controls the PWM duty cycle. These two solutions have prevented the effect from appearing significantly. What led us to belive that reducing t_blank to the minimum is that the period of the pre-fault oscillations was 20-21 ns, roughly equal to the increment size of t_blank.

    The oscillations still occasionally appear. We're also considering zener diodes breakdown of 16 V for the gates of the FETs. This is in order to protect the FETs in case the oscillations appear again. We've set source and sink currents at 100 mA with t_drive at 1.05 us

    Cheers,
    Mau
  • 0 in reply to Sergio Mauricio Guerrero Gaona
    TI__Genius 14487 points
    Mau and Jose,

    I'm glad you were able to improve the performance of your board by adjusting the settings on your device. Adding a zener diode can help to protect your FETs, so that's a good idea. If you can further modify your board, try to minimize trace inductance as much as possible by using wide, short traces when you can. Particularly, you want to do this for power supply pins and the gate drive traces from the DRV8704 to the FETs. For further protection from current spikes, you can add RC snubbers on the FETs and bulk capacitors across the whole H-bridge.