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DRA722: QSPI BOOT WORKS ONLY WHEN DEBUG PRINTING IS ON.

Part Number: DRA722

Hi all,

                              Im using a custom board based on DRA722 .I'm not able to boot from QSPI flash if I turn OFF the debug messages.But with debug printing turned ON,Im able to boot successfully.Now I have configured qspi flash to run at 8MHz.If use higher frequencies,that also leads to failure.

What could be the reason?

QSPI FLASH part number:mt25ql02gc

Regards,

Murugan S

  • Hi Murugan,

    I have forwarded your question to an expert for comment.

    Regards,
    Yordan
  • Hi Yordan,
    The issue is resolved.I lowered the frequency from 8MHz to 6MHz.Now i can boot from QSPI with DEBUG OFF.

    Regards,
    Murugan S
  • Hi Murugan,

    Lowering frequency is not an optimal solution for QSPI boot.
    RBL sets QSPI frequency as 48 MHz and SBL changes it to 64 MHz.
    What changes did you make in SBL to change frequency?
    Can you please provide more details on the issue you were facing.

    Regards,
    Rishabh
  • Hi Rishabh,
    From my observation,the only frequency related parameter that affects the SPL is "CONFIG_SF_DEFAULT_SPEED" in the include/configs/my_custom_board.h file.I did not change the values in dra7-evm.dts file,which is by default 76800000 MHz.But once the uboot is loaded,I can probe the spi flash at 76.8MHz (sf probe 0 76800000) and load the kernel without any issue.

    Regards,
    Murugan S
  • Hi Rishabh,
                                 When I keep the value of CONFIG_SF_DEFAULT SPEED in include/configs/board.h file as default 76.8 MHz ,I get he following error in QSPI boot:

    Found FIT
    spi_claim_bus: bus:0 cs:0
    spi_xfer: bus:0 cs:0 bitlen:0 flags:4
    Enable clock module - 4a008778
    Enable clock module - 4a008780
    clocks-common.c:Disable clock module - 4a008778
    clocks-common.c:Disable clock module - 4a008780
    spi_xfer: bus:0 cs:0 bitlen:0 flags:8
    spi_release_bus: bus:0 cs:0
    fit read sector 40000, sectors=1468, dst=807ffa00, count=1468
    spl_load_simple_fit: Cannot find /images node: -11
    SPL: failed to boot from all boot devices
    ### ERROR ### Please RESET the board ###

                                
                                  When I lower the value of CONFIG_SF_DEFAULT_SPEED to 6 MHz,I can successfully boot :
    Found FIT
    spi_claim_bus: bus:0 cs:0
    spi_xfer: bus:0 cs:0 bitlen:0 flags:4
    Enable clock module - 4a008778
    Enable clock module - 4a008780
    clocks-common.c:Disable clock module - 4a008778
    clocks-common.c:Disable clock module - 4a008780
    spi_xfer: bus:0 cs:0 bitlen:0 flags:8
    spi_release_bus: bus:0 cs:0
    fit read sector 40000, sectors=1468, dst=807ffa00, count=1468
    data_offset=0, data_size=47180
    U-Boot size 47180, data 80800000
    Aligned image read: dst=80800000, src_sector=405bc, sectors=47180
    spi_claim_bus: bus:0 cs:0
    spi_xfer: bus:0 cs:0 bitlen:0 flags:4
    Enable clock module - 4a008778
    Enable clock module - 4a008780
    clocks-common.c:Disable clock module - 4a008778
    clocks-common.c:Disable clock module - 4a008780
    spi_xfer: bus:0 cs:0 bitlen:0 flags:8
    spi_release_bus: bus:0 cs:0
    image: dst=80800000, data_offset=5bc, size=47180
    Selecting config 'dra72-evm', fdt 'fdt@2'
    FIT: Selected 'dra72-evm'
    spi_claim_bus: bus:0 cs:0
    spi_xfer: bus:0 cs:0 bitlen:0 flags:4
    Enable clock module - 4a008778
    Enable clock module - 4a008780
    clocks-common.c:Disable clock module - 4a008778
    clocks-common.c:Disable clock module - 4a008780
    spi_xfer: bus:0 cs:0 bitlen:0 flags:8
    spi_release_bus: bus:0 cs:0
    Aligned fdt read: dst 80847180, src_sector = 9b1d0, sectors 12a7c
    fdt: dst=80847180, data_offset=5b1d0, size=12a7c
    Jumping to U-Boot
    loaded - jumping to U-Boot...
    initcall: 8082313d
    initcall: 80827e21....

    NOTE:I have not changed the values in dra7-evm.dts or dra72-evm-common.dtsi where default value is 76.8MHz
    These are my other configuarions related to qspi flash:
    1)In drivers/mtd/spi/sf_params.c I added:
        {"mt25ql02g",      0x20ba22, 0x1044,    64 * 1024,  1024, RD_NORM,                   WR_QPP},
    2)In drivers/spi/ti_qspi.c I made some changes after referring the commands from my spi flash data sheet(i made the same changes in sf_internal.h):

     #define QSPI_CMD_READ                   (0x13 << 0)  //default 0x03
    #define QSPI_CMD_READ_DUAL              (0x3c << 0) //default 0x6b
    #define QSPI_CMD_READ_QUAD              (0x6c << 0)
    #define QSPI_CMD_READ_FAST              (0x0c << 0) //default 0x0b
    #define QSPI_SETUP0_NUM_A_BYTES         (0x3 << 8)  
    #define QSPI_SETUP0_NUM_D_BYTES_NO_BITS (0x0 << 10)
    #define QSPI_SETUP0_NUM_D_BYTES_8_BITS  (0x1 << 10)
    #define QSPI_SETUP0_READ_NORMAL         (0x0 << 12)
    #define QSPI_SETUP0_READ_DUAL           (0x1 << 12)
    #define QSPI_SETUP0_READ_QUAD           (0x3 << 12)
    #define QSPI_CMD_WRITE                  (0x12 << 16)
    #define QSPI_NUM_DUMMY_BITS             (0x0 << 24)

     data sheet of my spi flash:MT25Q_QLKT_U_512_ABB_0.pdf


    Regards,
    Murugan S

  • Hi Murugan,

    I am not an Uboot expert.
    I have pinged an expert who will help you.

    Regards,
    Rishabh
  • Murugan,

    I find it surprising that U-Boot is able to read data from QSPI correctly but MLO is unable to do so. The QSPI driver code is exactly the same between the two. We will need to investigate this further.

    What is your SYSBOOT setting ? Are you booting from QSPI? This question is important as it would tell us if Boot ROM is able to access QSPI without issues.

    For now, can you run the below tests ?

    1. Can you reduce the default speed of QSPI to 48 MHz and set the default mode to mode 3 and test ? This matches the settings used by boot rom to boot from QSPI.
    #define CONFIG_SF_DEFAULT_SPEED                48000000
    #define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_3
    1. If this does not work, disable EDMA support on top of the above change.
    #undef CONFIG_TI_EDMA3
    1. If even this does not work, try disabling QUAD SPI support.
    #undef CONFIG_QSPI_QUAD_SUPPORT

    regards,
    Venkat

  • Hi Venkat,
    Thanks alot for your advice!. "CONFIG_QSPI_QUAD_SUPPORT" was causing the problem.Our custom board did not support quad read.I can now boot from QSPI at 166MHz which the maximum supported speed for our spi flash.

    This the configuration that worked for me:

    #define CONFIG_SF_DEFAULT_SPEED 166000000 /*any frequency will work*/
    #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
    /*#define CONFIG_QSPI_BOOT */ //commented
    /*#define CONFIG_TI_EDMA3*/ //commented

    NOTE:SPI_MODE_3 caused unsupported JEDEC ID error.So I left it as SPI_MODE_0 and followed rest of your instructions.

    Regards,
    Murugan S
  • Murugan,

    Good to know.

    Mode 3 only works till 48 MHz. For higher clock speeds, you need Mode 0. So the change you have done is fine.

    DRA7x devices only support maximum clock speed of 76.8 MHz. Please do not set the QSPI clock to higher speed.

    Can you please confirm that this working for you with CONFIG_TI_EDMA3 defined?

    When you say that "custom board did not support quad read", do you mean that your board does not have necessary physical connections for Quad SPI mode?

    regards,
    Venkat
  • Hi Venkat,
    I tested MODE 3 at 48 MHz and it was reading a different JEDEC ID:

    SF: Unsupported flash IDs: manuf 10, jedec 5d11, ext_jedec 0822 (viz not my device)

    In the ti_qspi.c file I changed QSPI_DRA7XX_FCLK to 166000000 and made the same changes in the dts file.Is this a problem? Booting seems stable at the moment.

    I just gave away the board for testing.I will check whether it works with EDMA and get back to you.

    Yes,we are physically using only 2 pins for reading.

    Regards,
    Murugan S
  • Hi Venkat,
    QSPI boot is working with CONFIG_TI_EDMA3 enabled also.So the only change I had to make is to disable "CONFIG_QSPI_QUAD_SUPPORT".
    Thanks alot for your time and patience.
    Regards,
    Murugan S