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Linux/DRA712: PWM Device Tree configuration

Part Number: DRA712

Tool/software: Linux

Team

Our custom board has 4 PWM (ehrpwm1b; ehrpwm2a; ehrpwm3a; ehrpwm3b) as output, but only one (ehrpwm2a) is working properly. For test purposes they are not loaded (no pull or load is mounted on board) and output is measured by ORC.

We try enable it by Device Tree as detailed below (only two are showed for question purposes)

PWM working

f_sync {
      compatible = "pwm-backlight";
      pwm-names = "sync_pwm";
      pwms = <&ehrpwm1 0 5000000 0>;
      brightness-levels = <0 4 8 16 32 64 128 255>;
      default-brightness-level = <4>; 
   };
&ehrpwm1 {
   status = "okay";
   pinctrl-names = "default";
   pinctrl-0 = <&pinctrl_fsync_pwm>;
};
pinctrl_fsync_pwm: fsync_pwm_grp {
      pinctrl-single,pins = <
         DRA7XX_CORE_IOPAD(0x3774, (PIN_OUTPUT | MUX_MODE10))                    /* gpio6_10.ehrpwm2A */
      >;
   };

PWM not working (0V steady output)

disp_bcklgt: dispbcklgt {
      compatible = "pwm-backlight";
      pwm-names = "display_backlight";
      pwms = <&ehrpwm0 5000000 0>;
      brightness-levels = <0 4 8 16 32 64 128 255>;
      default-brightness-level = <4>; /*Tested with 0; 1; 4 & 7 but doesn't work*/
   };

&ehrpwm0 {
   status = "okay";
   pinctrl-names = "default";
   pinctrl-0 = <&pinctrl_disp_pwm>;
};

pinctrl_disp_pwm: disp_pwm_grp {
      pinctrl-single,pins = <
         DRA7XX_CORE_IOPAD(0x3568, (PIN_OUTPUT | MUX_MODE10))                    /* vin2a_d0.ehrpwm1B */
      >;
   };

We follow guidelines from  e2e.ti.com/.../366635 but doesn't help
 
1- What is the first parameter represents? We try changing 0/1 without effect (tested on working pwm). From documentation is not clear if its an enable or channel.

2-Using Register Descriptor Tool 1.0.0.2 for DRA712, to verify configuration settings, we see that is not possible set CTRL_CORE_PAD_VIN2A_D0.VI2A_D0_MUXMODE to ehrpwm1B (mode 10), CTRL_CORE_PAD_VIN2A_D18.VI2A_D0_MUXMODE to ehrpwm3B (mode 10) and CTRL_CORE_PAD_VIN2A_D170.VI2A_D0_MUXMODE to ehrpwm3A (mode 10). Setting manually Register Value to 0x1000A, Fiel Value for MUXMODE is showed in red. Are we missing anything?

3-Has ehrpwm1b or ehrpwm3x any constraint?

4-Are we missing anything in Device Tree?