Tool/software: Linux
Hi Forum,
I have been trying to implement 8bit address data multiplexed GPMC bus to my FPGA. There are a few problems getting it going. I hope you guys would be of help.
gpmc_default: gpmc_default { pinctrl-single,pins = < 0x3c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (A11) gpmc_ad15.gpmc_ad15 */ 0x38 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B11) gpmc_ad14.gpmc_ad14 */ 0x34 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (C11) gpmc_ad13.gpmc_ad13 */ 0x30 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (E11) gpmc_ad12.gpmc_ad12 */ 0x2c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D11) gpmc_ad11.gpmc_ad11 */ 0x28 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (F11) gpmc_ad10.gpmc_ad10 */ 0x24 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (A10) gpmc_ad9.gpmc_ad9 */ 0x20 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B10) gpmc_ad8.gpmc_ad8 */ 0x1c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B8) gpmc_ad7.gpmc_ad7 */ 0x18 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (C8) gpmc_ad6.gpmc_ad6 */ 0x14 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (A7) gpmc_ad5.gpmc_ad5 */ 0x10 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B7) gpmc_ad4.gpmc_ad4 */ 0xc ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (A6) gpmc_ad3.gpmc_ad3 */ 0x8 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B6) gpmc_ad2.gpmc_ad2 */ 0x4 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (A5) gpmc_ad1.gpmc_ad1 */ 0x0 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B5) gpmc_ad0.gpmc_ad0 */ 0x70 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (A2) gpmc_wait0.gpmc_wait0 */ 0x8c ( PIN_INPUT_PULLUP | MUX_MODE2 ) /* (A12) gpmc_clk.gpmc_wait1 */ 0x7c ( PIN_OUTPUT | MUX_MODE0 ) /* (A8) gpmc_csn0.gpmc_csn0 */ 0x88 ( PIN_OUTPUT | MUX_MODE0 ) /* (B12) gpmc_csn3.gpmc_csn3 */ 0x74 ( PIN_OUTPUT | MUX_MODE2 ) /* (B3) gpmc_wpn.gpmc_csn5 */ 0x78 ( PIN_OUTPUT | MUX_MODE2 ) /* (A3) gpmc_be1n.gpmc_csn6 */ 0x90 ( PIN_OUTPUT | MUX_MODE0 ) /* (A9) gpmc_advn_ale.gpmc_advn_ale */ 0x94 ( PIN_OUTPUT | MUX_MODE0 ) /* (E10) gpmc_oen_ren.gpmc_oen_ren */ 0x98 ( PIN_OUTPUT | MUX_MODE0 ) /* (D10) gpmc_wen.gpmc_wen */ 0x9c ( PIN_OUTPUT | MUX_MODE0 ) /* (C10) gpmc_be0n_cle.gpmc_be0n_cle */ >; }; &gpmc { status = "okay"; /* Disable eMMC when enabling GPMC/NAND */ pinctrl-names = "default"; pinctrl-0 = <&gpmc_default>; ranges = <3 0 0x02000000 0x00020000> sram@3,0 { reg = <3 0 0x00100000>; bank-width = <1>; gpmc,async-read; gpmc,async-write; gpmc,clk-activation-ns = <20>; gpmc,burst-length = <16>; gpmc,mux-add-data = <2>; gpmc,sync-clk-ps = <10000>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <141>; gpmc,cs-wr-off-ns = <141>; gpmc,adv-on-ns = <0>; gpmc,adv-rd-off-ns = <75>; gpmc,adv-wr-off-ns = <75>; gpmc,we-on-ns = <85>; gpmc,we-off-ns = <123>; gpmc,oe-on-ns = <85>; gpmc,oe-off-ns = <141>; gpmc,page-burst-access-ns = <10>; gpmc,access-ns = <50>; gpmc,rd-cycle-ns = <150>; gpmc,wr-cycle-ns = <150>; gpmc,wr-access-ns = <0>; gpmc,wr-data-mux-bus-ns = <85>; gpmc,bus-turnaround-ns = <10>; gpmc,cycle2cycle-samecsen; gpmc,cycle2cycle-delay-ns = <10>; };
the above is my device tree timings.
#include <stdint.h> #include <stdio.h> #include <fcntl.h> #include <sys/mman.h> #include <unistd.h> #define GPMC_BASE 0x02000000 static int devmemfd = -1; //map memory of length "len" at offset "offset" static void* util_mapmemoryblock(off_t offset, size_t len) { devmemfd = open("/dev/mem", O_RDWR | O_SYNC); void* registers = mmap(NULL, len, PROT_READ | PROT_WRITE, MAP_SHARED, devmemfd, offset); if (registers == MAP_FAILED) { printf("Map failed\n"); } return registers; } static void util_unmapmemoryblock(void* block, size_t len) { munmap((void*) block, len); if (devmemfd != -1) { close(devmemfd); } } #define REGLEN 0x00020000 static volatile uint32_t* registers = NULL; static void gpmc_mapregisters() { registers = (uint32_t*) util_mapmemoryblock(GPMC_BASE, REGLEN); } static void gpmc_unmapregisters() { util_unmapmemoryblock((void*) registers, REGLEN); } void gpmc_setup(void) { gpmc_mapregisters(); gpmc_unmapregisters(); } volatile uint8_t* extbus; void bus_init() { gpmc_setup(); extbus = (uint8_t*) util_mapmemoryblock(GPMC_BASE, REGLEN); } void bus_writebyte(uint8_t address, uint8_t data) { *(extbus + (address<<1)) = data; } uint8_t bus_readbyte(uint8_t address) { return*(extbus + (address<<1)); } void bus_shutdown() { util_unmapmemoryblock((void*) extbus, 0x200); } int main(int argc, char const *argv[]) { int i,a,f; int array[10]; bus_init(); /* for (i = 0; i < 10; i++) { printf("byte at address %x: %X\n", i, bus_readbyte(i)); }*/ if (strcmp("write", argv[1]) == 0) { a = strtol(argv[2], NULL, 0); f = strtol(argv[3], NULL, 0); bus_writebyte(a,f); } if (strcmp("read", argv[1]) == 0) { a = strtol(argv[2], NULL, 0); printf("read value: %x \n",bus_readbyte(a)); } if (strcmp("writetest", argv[1]) == 0) { for (i = 0; i < 10; i++) { bus_writebyte(i,0xaa); } } if (strcmp("readtest", argv[1]) == 0) { for (i = 0; i < 10; i++) { array[i]=bus_readbyte(i); printf("byte at address %x: %X\n", i, array[i]); } } bus_shutdown(); return 0; }
The problems I am facing right now
- my writes work fine and I could see the address and data works fine when i do a ./main 0x00 0x03 and so on.
- but when i do a read from the register the reads always return back the physical address of my asic instead of returning me the data.
./main write 0x02 0x04 ./main write 0x03 0x05 ./main read 0x02 readvalue: 0x02 ./main read 0x03 readvalue: 0x03
I am expecting the reads to return back the actual value written in my case (0x04 and 0x05) I can see the data arriving at the cpu through my logic analyzer but unfortunately my returns does not corellate to the values i see on the logic analyzer.
Any suggestions would be appreciated.
Regards
-Parker