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TAS5805M: The chip is not powered on during playback

Part Number: TAS5805M

Hi Ti,

The clock signal is 24,576Mhz, the bit-width is 16bit , slot is 32, sample is 48kHz

But The chip isn't powered on during playback, 0x68 = 0x02

I use an oscilloscope to get the waveform, data, fs, sclk are all correct.

Do I need other configuration regarding the chip's registers ?

Thanks

  • Hi Kai,

                1. What's the clock of 24.576MHz? What's your audio format, TDM or I2S? Pls share your I2S signal waveform.

                2. What's the value of Register 0x71 in book0 page0 when read back?

    Leon

  • Hi Leon ,

    My format :

    use TDM to playback

    sample 48kHz  , slot : 32 , bit_width : 16bit

    0x71 = 0x04

         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
    00: 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00    ...?............
    10: 01 00 00 00 11 00 00 00 00 00 00 00 00 00 00 00    ?...?...........
    20: 01 07 09 01 00 40 02 00 00 00 00 00 00 00 00 00    ????.@?.........
    30: 00 00 00 10 01 11 00 29 00 00 f9 04 00 20 80 00    ...???.)..??. ?.
    40: 01 00 00 00 00 00 11 00 00 00 00 00 30 30 33 30    ?.....?.....0030
    50: 07 00 00 00 00 00 00 00 00 00 00 00 00 f8 00 00    ?............?..
    60: 00 00 00 00 00 00 85 00 02 00 00 00 00 50 11 24    ......?.?....P?$
    70: 00 04 00 00 00 38 00 00 00 00 09 03 00 00 7b 00    .?...8....??..{.
    80: 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00    ...?............
    90: 01 00 00 00 11 00 00 00 00 00 00 00 00 00 00 00    ?...?...........
    a0: 01 07 09 01 00 40 02 00 00 00 00 00 00 00 00 00    ????.@?.........
    b0: 00 00 00 10 01 11 00 20 00 00 f9 04 00 20 80 00    ...???. ..??. ?.
    c0: 01 00 00 00 00 00 11 00 00 00 00 00 30 30 33 30    ?.....?.....0030
    d0: 07 00 00 00 00 00 00 00 00 00 00 00 00 f8 00 00    ?............?..
    e0: 00 00 00 00 00 00 85 00 02 00 00 00 00 50 11 24    ......?.?....P?$
    f0: 00 04 00 00 00 38 00 00 00 00 09 03 00 00 7b 00    .?...8....??..{.

    (2) tdm wave file as bellow

  • Hi Kai,

               From you register reading:

               0x33= 0x10  (TDM, 16bit width)

               0x34=0x01  (One BCK shift)

              Looks your configuration is good. But one concern need your confirm:

             1. What's your LRCLK signal? It's just one bit or 50% duty cycle? If one pulse you need set 0x33 as 0x14

    Leon

  • Hi Leon,

    I agree with your idea, my FS signal is short sync, which is less than 8sclk

    My FS/CLK signal is as follows:

  • Hi Kai,

            That confirms what I think, so you need to set register 0x33 to 0x14, so that clock fault will gone. You can have a try.

    Leon

  • Hi Leon,

    I want to play music through SDIN and output the music being played from DOUT at the same time, which means I want to get the recovery data, which register do I need to configure?

    I check the datasheet, 0x03 = 0x01,I use an oscilloscope to measure the waveform, the output waveform is different from the input 

    0x30h

    SDOUT Select. This bit selects what is being output as  SDOUT pin.
    0: SDOUT is the DSP output (post-processing)
    1: SDOUT is the DSP input (pre-processing

  • Hi Kai,

           Per my test, if use 0x30=0x01 in book0 page0, the SDOUT is same as SDIN. You should check it again. You can use TAS5805M EVM for a try. 

    Leon

  • Hi Leon,

    Can tas5805m receive the falling edge trigger ? The FS of my current platform is the falling edge short sync ,the register support does not support this configuration

    FS wav of my platform as bellow show

  • Hi Kai,

              We don't have register to support it.

    Leon