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TAS5720L: tas5720L clock consistency

Part Number: TAS5720L

Currently using mcu`s clock output is fixed and as below,
When WS is 43.71kHz, CK = 1.4MHz and MCK = 1.4MHz

But when WS is 86kHz, CK = 2.8MHz and MCK = 2.8MHz.

So as accepted clke pin indicate clock error and nothing comes out. Because CK to MCK ratio below 64, fixed to 32. So, is there any way to make work tas5720l frequencies as above?

  • Hello Omer,

    If the BCLK to LRCLK ratio is 64, MCLK can be tied directly to BCLK. Otherwise MCLK must be driven externally. The valid MCLK to LRCLK ratios are 64, 128, 256 and 512 as long as the frequency of MCLK is 25MHz or less.

    Your BCLK to LRCLK ratio is 32, so you need an external MCLK that satisfies the MCLK to LRCLK ratios. So you cannot have this current configuration work.

    best regards,

    Luis