Other Parts Discussed in Thread: PCM5102
While others have asked, I am still a bit unclear on I2S slave vs master with regard to a single onboard 24.576mhz crystal. My requirement is to only support 96khz, 24 bit.
In this case, the I2S host is in slave mode, the ADC (Cirrus Logic CS5361) is the I2S master and the DAC PCM5122 is I2S slave.
This means that PCM5122 SCK is (also) connected to the 24.576mhz crystal while PCM5122 BCK is connected to the ADC's I2S clock out (they label SCLK along with the host) as well as LRCK <-> LRCK.
1) Can the same crystal serve both the ADC and DAC in this configuration even though one is I2S master and the other is I2S slave?
2) Is host-based loopback still possible in that case or do I need to hardwire the lookback? I do not have loopback latency requirements.