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TAS5825P: On rare occasions, TAS5825P does not work correctly.(CLK_FAULT)

Dai
Intellectual 260 points
Part Number: TAS5825P

Hi,

On rare occasions(about once per 200 times power on sequence), TAS5825P does not work correctly.(CLK_FAULT)

I2C communication seems to be working correctly.(Read/Write)

But no sound after initialized.

In NG state, CLK FAULT flag in GLOBAL_FAULT1 register is activated.

And,

- FS bit in FS MON Register is set to 4'b0000.(Usually set to other suitable FS).

- Bit 3 in CLKDET_STATUS Register is set to 1.(Usually set to 0)

- POWER_STATE Register is set to 0x02.(Usually set to 0x03)

Once call initialize function again in NG state, TAS5825 works correctly.

Question

1. What is the cause of CLK FAULT?

2. How can I recover from this fault state without PDN?

If you need more information, please let me know.

  • 0
    TI__Genius 13870 points

    Hello Dai,

    Can you provide an waveform of your I2S signal? Are you violating the BCLK/LRCLK ratio at any time? In your sequence are you sending I2C before the I2S signal at any time? If the clocks are fully recovered you should be able to go to Hi-Z to Play and then clear the faults, can you test this sequence in your system to see if it works there.

    best regards,

    Luis

  • 0 in reply to Luis Fernandes de Pina
    Intellectual 260 points

    Hi Luis,

    Thank you for reply.

    > Are you violating the BCLK/LRCLK ratio at any time?

    Only starting step, both clocks are not unstable.

    (until Internal PLL of my system is locked.)

    >are you sending I2C before the I2S signal at any time?

    No. The sequence is as followings.

    Power on and set PDN to High > wait at least 5ms > send I2S signal > Initialize function by I2C.

    > If the clocks are fully recovered you should be able to go to Hi-Z to Play and then clear the faults, can you test this sequence in your system to see if it works there.

    You mean, no need initialize again, just clear flag and set Play state, right?

  • 0 in reply to Dai
    TI__Genius 13870 points

    Hello Dai,

    The 5ms delay in your sequence should be after you put the device in Hi-Z out from deep sleep.

    If you have no clock fault you should be able to clear flag and set to play state.

    best regards,

    Luis

  • 0 in reply to Luis Fernandes de Pina
    Intellectual 260 points

    Hi Luis,

    Thanks,

    > Only starting step, both clocks are not unstable.

    It was typo, I wanted to say [Only starting step, both clocks are unstable. (until PLL for I2S is locked.)]

    PLL for I2S unstable term is max. 200us.

    (Is there a possibility the cause of clock fault flag?)

    I show the sequence again.

    Power on and set PDN to High > wait at least 5ms > send I2S signal(unstable term) > send I2S signal(stable term)> Initialize function by I2C.

    > The 5ms delay in your sequence should be after you put the device in Hi-Z out from deep sleep.
    I also try it but no difference about clock fault.

    > If you have no clock fault you should be able to clear flag and set to play state.

    Please let me confirm.

    Power on and set PDN to High > (wait at least 5ms) > provide I2S(unstable term) > provide I2S(stable) > 5ms wait > Initialize by I2C > clear fault flag > set play state

    Is this the correct sequence?

    Best regards,

  • +1 in reply to Dai
    TI__Mastermind 30980 points

    Hi Dai

         The unstable of clock is very likely to trigger the clock fault flag. And I checked the register value you read at the fault state. It seems that the device can't recognize your LRCK frequency.

         It is better to follow the start up sequence in the Datasheet, as you described in the end. But "provide I2S(unstable term)" will have the chance to trigger the clock error. Since you can make sure the following I2S clock can be stable, there's no need to initialize again, just clear flag and set Play state.