This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV320DAC3100: set up device tree for processor driven audio clock

Part Number: TLV320DAC3100

Hello -

I am working with the sitara am335x processor and the tlv320dac3100.

I have managed to get it working with an external mclk and a modified DTS file to use the codec to generate the bclk and fclk signals.

Now I need to get it to work using the bclk and fclk driven from the sitara.  the reason for this is that I cannot use the mclk on the dac since it cannot be connected (pin was not wired in in the design)

what I dont understand and cannot seem to find is how to set up the device tree to support this mode.  I see examples of master mode (codec is master) as below:

simple-audio-card,bitclock-master = <&sound0_master>;
simple-audio-card,frame-master = <&sound0_master>;

I see no reference to a slave or any other mode.

please let  me know how to do this ...

the second part of this problem is setting up the clock source from the sitara internally so that the mcasp is fed with the correct clock and frequency (in my case 12000000 hz).  I dont know if this is done automatically when changing to the slave mode (however that is done)

Please let me know how that is done as well.

Finally - I don't understand why it is so difficult to find the information for any of these device tree based settings.  I cannot really do anything with the codec as I have almost 0 control of it through this abstracted mechanisms.  what am I missing?

Lastly - why did you get rid of all of the information prior to 2015. it seems to be relevant and is often linked to in the support questions (with the link failing of course). 

TI has always been my go to as a designer, but after the experience with with the sitara I am not sure any more. 

please let me know what is possible.

thanks

Mark