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TLV320AIC3104EVM-K: Only noise we can hear (No sound)

Part Number: TLV320AIC3104EVM-K
Other Parts Discussed in Thread: TLV320AIC3104, TLV320AIC3110, TEST, TAS2764

Hi team,
 I'm using TLV320AIC3104EVM-K(external codec)  with IMX8MM.
With below changes I can hear only noise.

Changes:
+        sound-tlv320aic3x {
+                compatible = "simple-audio-card";
+                simple-audio-card,name = "tlv320aic3x-Codec";
+                simple-audio-card,format = "i2s";
+                simple-audio-card,frame-master = <&cpudai1>;
+                simple-audio-card,bitclock-master = <&cpudai1>;
+
+            simple-audio-card,widgets =
+            "Microphone", "Mic Jack",
+            "Line", "Line Out",
+            "Line", "Line In",
+            "Headphone", "Headphone Jack",
+                    "Speaker", "speaker";
+        simple-audio-card,routing =
+            "Line Out", "HPLCOM",
+                    "Line Out", "HPRCOM",
+            "LINE1L", "Line In",
+            "LINE1R", "Line In",
+                    "Headphone Jack", "HPLOUT",
+                    "Headphone Jack", "HPROUT",
+            "MIC2L", "Mic Jack",
+            "MIC2R", "Mic Jack",
+            "Mic Jack", "Mic Bias",
+                    "speaker", "LLOUT",
+                    "speaker", "RLOUT";
+
+                cpudai1: simple-audio-card,cpu {
+                        sound-dai = <&sai1>;
+                        dai-tdm-slot-num = <2>;
+                        dai-tdm-slot-width = <32>;
+                };
+
+                simple-audio-card,codec {
+                        sound-dai = <&tlv320aic3x>;
+                        clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;
+                };
+        };
+        reg_3p3v: regulator-3p3v {
+                compatible = "regulator-fixed";
+                regulator-name = "3P3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        startup-delay-us = <300000>;
+                regulator-always-on;
+        };
+
+        reg_1p8v: regulator-1p8v {
+                compatible = "regulator-fixed";
+                regulator-name = "1P8V";
+                regulator-min-microvolt = <1800000>;
+                regulator-max-microvolt = <1800000>;
+                regulator-always-on;
+        };

+        tlv320aic3x: codec@18 {
+                compatible = "ti,tlv320aic3104";
+                reg = <0x18>;
+                pinctrl-0 = <&pinctrl_audio_reset>;
+                reset-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
+        ai31xx-micbias-vg = <MICBIAS_2_0V>;
+                #sound-dai-cells = <0>;
+                DRVDD-supply = <&reg_3p3v>;
+                AVDD-supply = <&reg_3p3v>;
+                IOVDD-supply = <&reg_3p3v>;
+                DVDD-supply = <&reg_1p8v>;
+        };

 &sai1 {
+        #sound-dai-cells = <0>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_sai1>;
+    fsl,sai-mclk-direction-output;
+        assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
+        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
+        assigned-clock-rates = <24576000>;
+        status = "okay";
+};

+       pinctrl_audio_reset: pinctrl_audio_reset {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1         0x13
+               >;
+       };

     pinctrl_sai1: sai1grp {
         fsl,pins = <
             MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK    0xd6
             MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC    0xd6
-            MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_SYNC    0xd6
+            /*MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_SYNC    0xd6*/
             MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK    0xd6
             MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0    0xd6
-            MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1    0xd6
+            /*MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1    0xd6
             MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2    0xd6
             MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3    0xd6
             MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4    0xd6
             MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5    0xd6
             MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6    0xd6
-            MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7    0xd6
+            MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7    0xd6 */
+            MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0    0xd6
         >;
     };
 
@@ -923,16 +1015,17 @@
         fsl,pins = <
             MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK    0xd6
             MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC    0xd6
-            MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_DATA4    0xd6
+        /*    MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_DATA4    0xd6*/
             MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK    0xd6
             MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0    0xd6
-            MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1    0xd6
+            /*MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1    0xd6
             MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2    0xd6
             MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3    0xd6
             MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4    0xd6
             MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5    0xd6
             MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6    0xd6
-            MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7    0xd6
+            MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7    0xd6 */
+            MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0    0xd6
         >;
     };

OUTPUT:

130|evk_8mm:/ # i2cdump -y -f 2 0x18

0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef

00: 00 00 00 10 04 00 00 00 00 00 00 01 00 00 00 80 ...??......?...?

10: 80 ff ff 78 78 78 78 78 78 06 00 fe 00 00 fe 00 ???xxxxxx?.?..?.

20: 00 20 00 00 20 00 00 00 00 00 00 80 80 00 00 00 . .. ......??...

30: 00 00 00 04 00 00 00 00 00 00 04 00 00 00 00 00 ...?......?.....

40: 00 04 00 00 00 00 00 00 04 00 00 00 00 00 00 00 .?......?.......

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

60: 00 02 00 00 00 00 02 00 00 00 00 00 00 00 00 00 .?....?.........

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

80: 00 00 00 10 04 00 00 00 00 00 00 01 00 00 00 80 ...??......?...?

90: 80 ff ff 78 78 78 78 78 78 06 00 fe 00 00 fe 00 ???xxxxxx?.?..?.

a0: 00 20 00 00 20 00 00 00 00 00 00 80 80 00 00 00 . .. ......??...

b0: 00 00 00 04 00 00 00 00 00 00 04 00 00 00 00 00 ...?......?.....

c0: 00 04 00 00 00 00 00 00 04 00 00 00 00 00 00 00 .?......?.......

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

e0: 00 02 00 00 00 00 02 00 00 00 00 00 00 00 00 00 .?....?.........

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

evk_8mm:/ #

regmap:

vk_8mm:/sys/kernel/debug/regmap/2-0018 # cat registers

00: 00

01: XX

02: 00

03: 20

04: 1c

05: 36

06: b0

07: 0a

08: 00

09: 00

0a: 00

0b: 01

0c: 00

0d: 00

0e: 00

0f: 20

10: 20

11: ff

12: ff

13: 00

14: 78

15: 78

16: 00

17: 78

18: 78

19: 00

1a: 00

1b: fe

1c: 00

1d: 00

1e: fe

1f: 00

20: 18

21: 18

22: 00

23: 00

24: 00

25: 00

26: 00

27: 00

28: 40

29: 00

2a: 00

2b: af

2c: af

2d: 00

2e: 2f

2f: af

30: 00

31: 00

32: 00

33: 0c

34: 00

35: 2f

36: af

37: 00

38: 00

39: 00

3a: 0c

3b: 00

3c: 00

3d: 00

3e: 00

3f: 2f

40: af

41: 0c

42: 00

43: 00

44: 00

45: 00

46: 2f

47: af

48: 0c

49: 00

4a: 00

4b: 00

4c: 00

4d: 00

4e: 00

4f: 00

50: 00

51: 2f

52: af

53: 00

54: 00

55: 00

56: 08

57: 00

58: 00

59: 00

5a: 00

5b: 2f

5c: af

5d: 08

5e: 00

5f: 00

60: 00

61: 00

62: 00

63: 00

64: 00

65: 01

66: 02

67: 00

68: 00

69: 00

6a: 00

6b: 00

6c: 00

6d: 00

tinymix:

evk_8mm:/ # tinymix

Mixer name: 'tlv320aic3x-Codec'

Number of controls: 78

ctl type num name value

0 INT 2 PCM Playback Volume 80 80

1 INT 1 Left Line Mixer PGAR Bypass Volume 118

2 INT 1 Left Line Mixer DACR1 Playback Volume 118

3 INT 1 Right Line Mixer PGAL Bypass Volume 118

4 INT 1 Right Line Mixer DACL1 Playback Volume 118

5 INT 1 Left HP Mixer PGAR Bypass Volume 118

6 INT 1 Left HP Mixer DACR1 Playback Volume 118

7 INT 1 Right HP Mixer PGAL Bypass Volume 118

8 INT 1 Right HP Mixer DACL1 Playback Volume 118

9 INT 1 Left HPCOM Mixer PGAR Bypass Volume 118

10 INT 1 Left HPCOM Mixer DACR1 Playback Volume 118

11 INT 1 Right HPCOM Mixer PGAL Bypass Volume 118

12 INT 1 Right HPCOM Mixer DACL1 Playback Volume 118

13 INT 2 Line PGA Bypass Volume 71 71

14 INT 2 Line DAC Playback Volume 71 71

15 INT 2 HP PGA Bypass Volume 71 71

16 INT 2 HP DAC Playback Volume 71 71

17 INT 2 HPCOM PGA Bypass Volume 71 71

18 INT 2 HPCOM DAC Playback Volume 71 71

19 INT 2 Line Playback Volume 0 0

20 BOOL 2 Line Playback Switch On On

21 INT 2 HP Playback Volume 0 0

22 BOOL 2 HP Playback Switch On On

23 INT 2 HPCOM Playback Volume 0 0

24 BOOL 2 HPCOM Playback Switch On On

25 BOOL 2 AGC Switch Off Off

26 ENUM 1 Left AGC Target level -5.5dB

27 ENUM 1 Right AGC Target level -5.5dB

28 ENUM 1 Left AGC Attack time 8ms

29 ENUM 1 Right AGC Attack time 8ms

30 ENUM 1 Left AGC Decay time 100ms

31 ENUM 1 Right AGC Decay time 100ms

32 BOOL 2 De-emphasis Switch Off Off

33 INT 2 PGA Capture Volume 32 32

34 BOOL 2 PGA Capture Switch On On

35 ENUM 2 ADC HPF Cut-off Disabled Disabled

36 ENUM 1 Output Driver Power-On time 0us

37 ENUM 1 Output Driver Ramp-up step 0ms

38 ENUM 1 Left DAC Mux DAC_L1

39 ENUM 1 Left HPCOM Mux differential of HPLOUT

40 ENUM 1 Right DAC Mux DAC_R1

41 ENUM 1 Right HPCOM Mux differential of HPROUT

42 ENUM 1 Left Line1L Mux single-ended

43 ENUM 1 Left Line1R Mux single-ended

44 ENUM 1 Right Line1L Mux single-ended

45 ENUM 1 Right Line1R Mux single-ended

46 BOOL 1 Left PGA Mixer Line1L Switch On

47 BOOL 1 Left PGA Mixer Line1R Switch Off

48 BOOL 1 Left PGA Mixer Mic2L Switch Off

49 BOOL 1 Left PGA Mixer Mic2R Switch Off

50 BOOL 1 Right PGA Mixer Line1R Switch On

51 BOOL 1 Right PGA Mixer Line1L Switch Off

52 BOOL 1 Right PGA Mixer Mic2L Switch Off

53 BOOL 1 Right PGA Mixer Mic2R Switch Off

54 BOOL 1 Left Line Mixer PGAL Bypass Switch Off

55 BOOL 1 Left Line Mixer DACL1 Switch On

56 BOOL 1 Left Line Mixer PGAR Bypass Switch Off

57 BOOL 1 Left Line Mixer DACR1 Switch Off

58 BOOL 1 Right Line Mixer PGAL Bypass Switch Off

59 BOOL 1 Right Line Mixer DACL1 Switch Off

60 BOOL 1 Right Line Mixer PGAR Bypass Switch Off

61 BOOL 1 Right Line Mixer DACR1 Switch On

62 BOOL 1 Left HP Mixer PGAL Bypass Switch Off

63 BOOL 1 Left HP Mixer DACL1 Switch On

64 BOOL 1 Left HP Mixer PGAR Bypass Switch Off

65 BOOL 1 Left HP Mixer DACR1 Switch Off

66 BOOL 1 Right HP Mixer PGAL Bypass Switch Off

67 BOOL 1 Right HP Mixer DACL1 Switch Off

68 BOOL 1 Right HP Mixer PGAR Bypass Switch Off

69 BOOL 1 Right HP Mixer DACR1 Switch On

70 BOOL 1 Left HPCOM Mixer PGAL Bypass Switch Off

71 BOOL 1 Left HPCOM Mixer DACL1 Switch On

72 BOOL 1 Left HPCOM Mixer PGAR Bypass Switch Off

73 BOOL 1 Left HPCOM Mixer DACR1 Switch Off

74 BOOL 1 Right HPCOM Mixer PGAL Bypass Switch Off

75 BOOL 1 Right HPCOM Mixer DACL1 Switch Off

76 BOOL 1 Right HPCOM Mixer PGAR Bypass Switch Off

77 BOOL 1 Right HPCOM Mixer DACR1 Switch On

evk_8mm:/ #


 

  • Hi,

    You have multiple posts, are these of the same system? 

    Your previous post shows I2C transaction issue and looking at your i2cdump above nothing is configured.

    Both ADC and DAC paths are disabled/powered down.

    I suggest get this post resolved first.

    https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1060877/tlv320aic3104-q1-need-help-to-solve-error-error-at-snd_soc_component_update_bits-and-error-at-soc_component_write_no_lock

    Regards,

    Peter

  • Hi Peter,

    We have two different system.

    1. IMX8MM with Internal codec tlv320aic3110

    >>> Which is having different E2E case.

    >> For internal codec we are facing i2C communication issue. Don't confused between both the cases.

    2. IMX8MM with External codec tlv320aic3104 .

    >> In this system we are able to play audio file though headphones , But for few files we are getting following error.

    >>

    Failure Sample:

    evk_8mm:/ # tinyplay /sdcard/SineWaveMinus16.wav                                                                                     
    Unable to open PCM device 0 (cannot set hw params: Invalid argument)

    Logcat:

    [  675.093204] Divyesh -< soc-read> Func:snd_soc_component_read,reg: 9
    [  675.093213] Divyesh -< soc-write> Func:snd_soc_component_write,reg: 9, value: 48
    [  675.093222] Divyesh -< soc-write> Func:snd_soc_component_write,reg: 101, value: 0
    [  675.093227] Divyesh -< soc-update> Func:snd_soc_component_update_bits,reg: 3, value: 128,mask: 128
    [  675.093232] Divyesh -< soc-write> Func:snd_soc_component_write,reg: 7, value: 138
    [  675.093235] Divyesh -< soc-write> Func:snd_soc_component_write,reg: 2, value: 0
    [  675.093294] Divyesh -< soc-update> Func:snd_soc_component_update_bits,reg: 3, value: 3,mask: 7
    [  675.093298] Divyesh -< soc-write> Func:snd_soc_component_write,reg: 11, value: 1
    [  675.093301] Divyesh -< soc-write> Func:snd_soc_component_write,reg: 4, value: 20
    [  675.093305] Divyesh -< soc-write> Func:snd_soc_component_write,reg: 5, value: 80
    [  675.093309] Divyesh -< soc-write> Func:snd_soc_component_write,reg: 6, value: 20
    [  675.093324] fsl-sai 30010000.sai: failed to derive required Tx rate: 2822400
    [  675.100430] fsl-sai 30010000.sai: ASoC: error at snd_soc_dai_hw_params on 30010000.sai: -22
    [  675.108794] Divyesh -< soc-read> Func:snd_soc_component_read,reg: 43
    [  675.108799] Divyesh -< soc-read> Func:snd_soc_component_read,reg: 44

    Could please help us to figure out what changes needed with respect to SAI1 node in dtsi file.

    Please give us idea about required Tx rate. So can play all the audio files through headphones without any required Tx rate error.

    1. All system volume like alarm, ringtone and button sound are working through Headphones.
    2. We can play few specific audio files as of now. We need to figure out or set proper clock rates for codec to play all the audio files.
    3. As of now MIC is not working . Means we tried to capture audio using tinycap utility, but only noise is getting recorded 

  • Kindly share the SineWaveMinus16.wav with me, I will check the samplerate and bitwidth of this file

  • The Wav file is not playing using tinyplay command.

    but we are able to play using system application , VLC player etc.

  • We are ok with Headphones output.

    Could you please help us with MIC input, we are not able to record anything.

    Pls check above configurations.

  • The bitwidth of the bitstream is 32bits and samplerate is 44.1kHz, pls check whether the MCLK can support  "failed to derive required Tx rate: 2822400"?

    My suggestion is to resample the original audio stream to a certain samplerate and bitwidth, then transmit the data to the chip.

  • Tell me the record commands you used. For example, the tinycap, and tinymix you used, Thanks.

  • We are using system application "sound recorder"

  • Hi Team

    Facing one issue related to noise.

    whenever I play sound, ringtone, system sound. I can hear little bit noise while audio playing.

    Main issue is when I terminate audio ,after that I can hear noise for at least 2 to 3 seconds. Means audio is terminating but noise is there for at least 3 4 sec.

    What are reasons for the noise and how to eliminate it?

  • Please check connections as well.. I can hear little bit  noise through headphone jack .

    And after terminating sound , it is taking 3 4 sec to actually terminate the audio 

  • Is the noise heard from I2S to headphone (DAC) path or only from MIC to headphone?

    Isolate the path so we can zoom in on possible cause.

    Has the codec setting/configuration confirmed correct?

    Regards.

  • Hi ,

    We are not using MIC as of now.

    Noise is not only from Headphones output, but we are getting it from all the outputs from DAC:

    In idle case all the outputs are providing 0.5V and decreasing continuously. 

    What are the way to keep voltage level to 0 in idle condition?

    Q:Has the codec setting/configuration confirmed correct?

    >> We are not sure

  • Please check the configuration especially your MCLK relation to the sampling, PLL ratio, bit depth etc..

    Check your registers dump against the register map in datasheet section 10.6 and make sure that's the correct path.

    Normally this noise issue of DAC to driver likely due to clock setting/ratio mismatch.

    I suggest you read section 10.3.3 of the datasheet to familiarize yourself with the clock tree and use the PLL calculator from this site to get the correct ratio.

    https://www.ti.com/product/TLV320AIC3104

    Regards.

  • Hi,

    Few inputs and outputs:

    Changes:

    +                simple-audio-card,codec {
    +                        sound-dai = <&tlv320aic3x>;
    +                        clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;
    +                };

     &sai1 {
    +        #sound-dai-cells = <0>;
    +        pinctrl-names = "default";
    +        pinctrl-0 = <&pinctrl_sai1>;
    +        assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
    +        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
    +        assigned-clock-rates = <12288000>;
    +        status = "okay";
    +};

    Audio File Info:

    test_dummy.wav                                                                                          
    Playing sample: 2 ch, 48000 hz, 16 bit 139792304 bytes

    LOG:

    [ 3.608447] Divyesh -tlv320aic3x Func:aic3x_set_dai_sysclk, Freq: 12288000

    1. When PA is power off (Disconnected) + Audio Playing:

     MCLK : 12.29MHZ

    BCLK: 1.534MHz

    WCLK: 48.00KHz

    2. When PA is powered ON (Connected ) + Audio Playing:

    MCLK: Fluctuating continuously- 7MHz to 25MHz

    BCLK:1.537MHz

    WCLK: 48KHz

    ISUUEs:

    1. Along with audio noise is there.

    2. When I stop audio , Audio is getting stopped but noise is there for at least 3 4sec after audio stop action.

    Thanks.

  • Addition to above comment:

    1. We have not made any changes in driver file

    2. We have not changed any register value (defaults values we are using).

  • From your settings above:

    • PLL is disabled with Q=2 gives 48KHz Fs
    • DAC path is off for both left and right path
    • Codec is slave mode
    • no ADC HPF and no digital effect on DAC
    • Both left and right ADC are muted
    • No input connected to either left or right ADC channel
    • DAC is powered down

    In summary nothing is enabled in your path, you need to configure your DAC path.

    Regards.

  • Ok thanks for your inputs.

    Just for you reference, currently we can hear audio with little bit noise.

    Could you please give some idea , what need to be done for the above issues?

    Please highlight what and where we need to change for above issues?

    Our requirement is as below:

    1. Only headset and L/R speakers out should be enabled in final changes.

    Thanks,

    DIVYESH

  • The paths are off, so not sure why you are hearing sound.

    Here are the steps to configure the codec and you need to refer to the datasheet register map section 10.6 for your settings:

    1. Configure your clock with or without PLL, register 3-6, 102
    2. Configure the audio interface per your requirement, register 8-10
    3. Configure DAC, register 37, 41, 43-44
    4. Configure your output driver, register 47 onwards depending on the path you choose

    Regards.

  • Hi ,

    I have collected I2C dump in the following condition:

    1. Song is not playing ( IDLE STATE)

    2. SONG is playing

    Thanks.

  • Hi,

    Please check the latest update on codec:

    We are able to play system sound, youtube and the audio files. But there is little bit noise with audio

    Noise is coming from all the outputs like speaker, headphone, HPR/L etc.

    *********************************************************************************************************************************************

    1. Song is not playing ( IDLE STATE)

    a) I2C dump

    b) Clock summury

        audio_pll1_ref_sel                0        0        0    24000000          0     0  50000

           audio_pll1                     0        0        0   393216000          0     0  50000

              audio_pll1_bypass           0        0        0   393216000          0     0  50000

                 audio_pll1_out           0        0        0   393216000          0     0  50000

                    sai3                  0        0        0    24576000          0     0  50000

                       sai3_root_clk       0        0        0    24576000          0     0  50000

                    sai2                  0        0        0    24576000          0     0  50000

                       sai2_root_clk       0        0        0    24576000          0     0  50000

                    sai1                  0        0        0    49152000          0     0  50000

                       sai1_root_clk       0        0        0    49152000          0     0  50000

     osc_32k                              0        0        0       32768          0     0  50000

    c)MCLK

    d)WCLK

    e)BCLK

    *********************************************************************************************************************************************

    2. SONG is playing

    a) I2C dump

    b)Clock summury

        audio_pll1_ref_sel                1        1        0    24000000          0     0  50000

           audio_pll1                     1        1        0   393216000          0     0  50000

              audio_pll1_bypass           1        1        0   393216000          0     0  50000

                 audio_pll1_out           1        1        0   393216000          0     0  50000

                    sai3                  0        0        0    24576000          0     0  50000

                       sai3_root_clk       0        0        0    24576000          0     0  50000

                    sai2                  0        0        0    24576000          0     0  50000

                       sai2_root_clk       0        0        0    24576000          0     0  50000

                    sai1                  1        1        0    49152000          0     0  50000

                       sai1_root_clk       2        2        0    49152000          0     0  50000

     osc_32k                              0        0        0       32768          0     0  50000

    evk_8mm:/ #

    c)MCLK

    d)WCLK

    e)BCLK

    **************************************************************************************************

    NOTE: Please refer below switch positions for the SW2 on USB MODEVM board.

    Could you please check what's the issue? 

    We are using Imx8mm-evk with TLV codec setup.

  • From the SW2 picture above, you have EXT MCK and USB MCK both HI which means you will have MCLK from USB and external source.

    Where is your MCLK comes from? If you have external MCLK then switch USB MCK to LO and change register 3 from 0x40 to 0x10.

  • Hi,

    We are giving MCLK from NXP processor (imx8mm).We are not connecting any usb cable to TLV board. Providing 5v supply from NXP processor only.

    In that case what should be the changes required.

    Please give your analysis on other parameters as well.

  • Hi,

    We have turned OFF USB MCK switch tried to change register 3 from 0x40 to 0x10. Still noise is there

    Still we are getting Audio and little bit noise

  • Your MCLK is really bad in the first place; clock jitter contributes to noise also.

    I don't know how you use the EVM in your setup, I'd suggest clean your clock and run your DAC setting just with the EVM before porting over to your system.

  • Hi Pdjuandi,

    Could you pls brief on the " clean your clock and run your DAC setting just with the EVM before porting" ?

    How to clean clk ?

    Thanks

  • See your MCLK above. Capture your MCLK from your host with scope without any connection to the EVM, is it clean? If not something in your host configuration/system causes the MCLK to be jittery. You have to fix that I can't help you there.

  • Ok Thanks.

    Whenever we are playing any audio file. It is playing from all the outputs at the same time.

    What needs to be done to assign priorities between Headphone and Speaker.

    Example: if audio is playing from speaker, at the same time if I plugged in headset, that time audio sound should route to headset from speaker and spkr output should turned off.

  • I think you control that from ALSA, but I'm not familiar with Linux sound architecture.

  • Ok Thanks.

    It would be great if you share any example for ALSA changes.

  • We don't have that, you will need to search or check with Linux ALSA community.

  • Hi

    I have one doubt regarding codec file.

    We have kernel version 5.1.

    I'm trying to add headset detection implementation in out code:

    +++ b/sound/soc/codecs/tlv320aic3x.c
    @@ -1481,6 +1481,42 @@ static int aic3x_set_bias_level(struct snd_soc_component *component,
            return 0;
     }
     
    +void aic3x_set_headset_detection(struct snd_soc_component *codec, int detect,
    +                                int headset_debounce, int button_debounce)
    +{
    +       u8 val;
    +
    +       val = ((detect & AIC3X_HEADSET_DETECT_MASK)
    +               << AIC3X_HEADSET_DETECT_SHIFT) |
    +             ((headset_debounce & AIC3X_HEADSET_DEBOUNCE_MASK)
    +               << AIC3X_HEADSET_DEBOUNCE_SHIFT) |
    +             ((button_debounce & AIC3X_BUTTON_DEBOUNCE_MASK)
    +               << AIC3X_BUTTON_DEBOUNCE_SHIFT);
    +
    +       if (detect & AIC3X_HEADSET_DETECT_MASK)
    +               val |= AIC3X_HEADSET_DETECT_ENABLED;
    +
    +       snd_soc_component_write(codec, AIC3X_HEADSET_DETECT_CTRL_A, val);
    +}
    +EXPORT_SYMBOL_GPL(aic3x_set_headset_detection);
    +
    +int aic3x_headset_detected(struct snd_soc_component *codec)
    +{
    +       u8 val;
    +       snd_soc_component_read(codec, AIC3X_HEADSET_DETECT_CTRL_B, &val);
    +       return (val >> 4) & 1;
    +}
    +EXPORT_SYMBOL_GPL(aic3x_headset_detected);
    +
    +int aic3x_button_pressed(struct snd_soc_component *codec)
    +{
    +       u8 val;
    +       snd_soc_component_read(codec, AIC3X_HEADSET_DETECT_CTRL_B, &val);
    +       return (val >> 5) & 1;
    +}
    +EXPORT_SYMBOL_GPL(aic3x_button_pressed);
    +
    +
     #define AIC3X_RATES    SNDRV_PCM_RATE_8000_96000
     #define AIC3X_FORMATS  (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
                             SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE | \
    @@ -1547,6 +1583,9 @@ static int aic3x_init(struct snd_soc_component *component)
            snd_soc_component_write(component, LDAC_VOL, DEFAULT_VOL | MUTE_ON);
            snd_soc_component_write(component, RDAC_VOL, DEFAULT_VOL | MUTE_ON);
     
    +       /*Enabling headphone detector*/
    +       snd_soc_component_write(component, AIC3X_HEADSET_DETECT_CTRL_A, 0x80);
    +
            /* DAC to HP default volume and route to Output mixer */
            snd_soc_component_write(component, DACL1_2_HPLOUT_VOL, DEFAULT_VOL | ROUTE_ON);
            snd_soc_component_write(component, DACR1_2_HPROUT_VOL, DEFAULT_VOL | ROUTE_ON);
    diff --git a/sound/soc/codecs/tlv320aic3x.h b/sound/soc/codecs/tlv320aic3x.h
    index 66d3580..f7f1473 100644
    --- a/sound/soc/codecs/tlv320aic3x.h
    +++ b/sound/soc/codecs/tlv320aic3x.h
    @@ -236,6 +236,9 @@
     /* Default input volume */
     #define DEFAULT_GAIN    0x20
     
    +/*Default Headset, Button Press Detection Bit enable */
    +#define DEFAULT_HEADSET_BIT_DETECTION    0x80
    +
     /* MICBIAS Control Register */
     #define MICBIAS_LEVEL_SHIFT    (6)
     #define MICBIAS_LEVEL_MASK     (3 << 6)
    @@ -285,4 +288,10 @@ enum {
     #define AIC3X_BUTTON_DEBOUNCE_SHIFT    0
     #define AIC3X_BUTTON_DEBOUNCE_MASK     3
     
    +/* see the enums above for valid parameters to this function */
    +
    +void aic3x_set_headset_detection(struct snd_soc_component *codec, int detect, int headset_debounce, int button_debounce);
    +int aic3x_headset_detected(struct snd_soc_component *codec);
    +int aic3x_button_pressed(struct snd_soc_component *codec);
    +

    But i'm getting following errors:

    /home/divyesh/Kimball-code/vendor/nxp-opensource/kernel_imx/scripts/Makefile.build:272: recipe for target 'sound/soc/codecs/tlv320aic3x.o' failed
    /home/divyesh/Kimball-code/vendor/nxp-opensource/kernel_imx/scripts/Makefile.build:515: recipe for target 'sound/soc/codecs' failed
    /home/divyesh/Kimball-code/vendor/nxp-opensource/kernel_imx/scripts/Makefile.build:515: recipe for target 'sound/soc' failed
    /home/divyesh/Kimball-code/vendor/nxp-opensource/kernel_imx/Makefile:1907: recipe for target 'sound' failed
    make[2]: Leaving directory '/home/divyesh/Kimball-code/out/target/product/evk_8mm/obj/KERNEL_OBJ'
    Makefile:185: recipe for target '__sub-make' failed
    make[1]: Leaving directory '/home/divyesh/Kimball-code/vendor/nxp-opensource/kernel_imx'
    /home/divyesh/Kimball-code/device/nxp/common/build/kernel.mk:190: recipe for target '/home/divyesh/Kimball-code/out/target/product/evk_8mm/obj/KERNEL_OBJ/arch/arm64/boot/Image' failed
    build post process

    Could you please give some inputs here?

  • Our driver team in China is off this week due to Chinese New Year, it will only be next week when they will be able to respond on this.

  • Hi pdj,

    Can you tell me about headset detection mechanism.

    means which the registers to be set to what value?

    I'm using EVM, Please guide me about jumper settings for EVM board as well. 

    Is this codec made in such manner so that output can drive from all the output Audio ports at the same time?

  • You can read the detection mechanism in this document.

    https://www.ti.com/lit/an/slaa454/slaa454.pdf?ts=1643992373526&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTLV320AIC3104

    For register see section 10.3.11 (page 42) of the datasheet.

    https://www.ti.com/lit/ds/symlink/tlv320aic3104.pdf?ts=1644002403527&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTLV320AIC3104

    On EVM if you are connecting input from jack J8 then remove JMP3 and JMP4.

    Outputs are configurable depends on what you want to drive/enable.

  • Hi,

    If you check i2cdump in previous comments , headset detection registers 13 14 96 97 showing 00 value.

    Provide any example to initiate headset detection reference for 3104 for HW/SW point of view

    Why i2cdump and kernel/debug/regmap/registers values are diff?

    Does jack J9 has mic input along with headset?

    Im not a HW engg. Please guide me for jumper settings JMP11,12,13,14,15 for headset detection for jack J9?

    Please explain software wise headset detection mechanism as well? Not able to understand comparator diagrams.

    Outputs are configurable depends on what you want to drive/enable.>>> With initial changes im getting output from L/R out, HP, headset jack at same time and 1.4v from all the outputs.

    If possible , Please provide email ID of software expert from TI for 3104. 

  • Hi,

    These registers are for users to configure per their application, by default those are disabled that's why they are 00.

    To enable headset detect on the EVM:

    • Set JMP10 to pin 2 and 3, remove JMP3 and JMP4
    • Enable headset detect in register 13 (0x0D) with 0x80 data
    • Set the MICBIAS level in register 25 (0x19) say 2V with 0x40 data
    • Plug in an audio plug into J8 and not J9
    • Read the interrupt flag register 97 (0x61) bit D2

    i2cdump is whatever you have set in your registers, so make sure you run those after you have set you registers.  

    No the EVM audio jacks either J8 or J9 is just a stereo jack (TRS), but you can still check the headset detection functionality per above steps.

    JMP11 to JMP15 is not for headset detection they are for audio output.

    All output registers are configurable, so they are on because you enable them.

    If it's related to our driver, Raphael will be the person to respond in this thread.

  • Hi 

    You can use i2cset command to config the registers to enable/disable output paths.

  • i2cset is just temporary utility to set register value? once device get rebooted , again reg value comes to default one.

    can you please share driver file change to enable headset detection bit (reg 13)?

    does headset detection works for J9? or it is works only for J8?

    All output registers are configurable, so they are on because you enable them. >>> What should be done to get audio output from headset only when headset in plugged in.

  • Hi,

    If you want to permanently store the register settings then you need to have a non-volatile memory (ROM) in your system, otherwise the settings will be backed to default when you cycle power the codec or any IC for that matter, same goes with EVM.

    As mentioned by Raphael you use i2cset to configure the device registers with i2c bus including the headset detection above.

    Headset detection is for input so only J8, so when you insert or remove the plug from J8 there will be an interrupt generated in register 97. It doesn't have to be from HP output for this testing. See the headset detection document.

    Please refer to the datasheet and its registers on how to enable/disable the output module.

  • Hi 

    The driver is universal code.

    Please use i2cset command to set register value and try to enable/disable the output module.After you fix the register value,you can add code in your driver.

  • Hi pdjaundi and Paphael,

    Thanks for your replies.

    whenever I'm enabling register 13 to headset detection ON.

    I can see headset is getting detected by observing registers 13 14 96 & 97.

    I2Cset is working.

    Lets talk about driver code changes:

    I have added changes in init function of codec file:

    +       snd_soc_component_write(component, AIC3X_HEADSET_DETECT_CTRL_A, 0x8b);

    +       snd_soc_component_write(component, AIC3X_HEADSET_DETECT_CTRL_B, 0x80);

    Values in I2Cdump are not changing, but i can see changes in regmap.

    So, even after setting registers in codec file, i2cdump is not changing.

  • It sounds like something with your Linux settings, but I will let Raphael comment on that.

  • Ok..

    Few more questions:

    1. Is it possible to control temp and heat of codec board? if yes ? how?

    2. Is it possible to control power of codec? if yes? how? I have to control power based on input voltage ? how to vary codec power ?

    3. How to control codec gain?

    Thanks. 

  • Hi Peter,

    Do we have requirement to set  register AIC3X_HEADSET_DETECT_CTRL_A and AIC3X_HEADSET_DETECT_CTRL_B?like the register value go back to default value if not meet the requirement?

  • Hi 

    Values in I2Cdump are not changing, but i can see changes in regmap

    Could you advise what command do you use to see regmap?

  • Also AIC3104 has 2 page register,please make sure you write correct page

    1. No.
    2. The codec power like AVDD, DVDD, IOVDD are input, so you will provide from your system.
    3. codec gain is controlled through registers.
  • vk_8mm:/sys/kernel/debug/regmap/2-0018 # cat registers

  • You can try add function : volatile

    The example is : 

    static bool TAS2764_volatile(struct device *dev, unsigned int reg)
    {
    return true;
    }

    static const struct regmap_config tas2764_i2c_regmap = {
    .reg_bits = 8,
    .val_bits = 8,
    .reg_defaults = tas2764_reg_defaults,
    .num_reg_defaults = ARRAY_SIZE(tas2764_reg_defaults),
    .cache_type = REGCACHE_RBTREE,
    .ranges = tas2764_regmap_ranges,
    .num_ranges = ARRAY_SIZE(tas2764_regmap_ranges),
    .max_register = 1 * 128,
    .volatile_reg = TAS2764_volatile,
    };