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TAS5548: DSP configuration between TAS5558 and TAS5548

Part Number: TAS5548
Other Parts Discussed in Thread: TAS5634EVM, TAS5634, TAS5558,

Hi Ti Team,

One issue we are having is transferring DSP configuration from the TAS5634EVM board to our amplifier board. I know how to export the files and program into the DSP, this isn't the problem. The TAS5634 has a TAS5558 DSP on it, we are using a TAS5548 in our board. Do you know of any issues creating or transferring DSP configurations between these parts?

I looked at the datasheets and I see only one difference in the configuration registers. There is a difference between register 0x40, please see the attached image. The problem is this has no default value in the datasheet, it is marked as "RESERVED" and when I create the configuration there seems to be data written to this register and I don't know why. I'd like to know if I need to set this register to a different value to make our configuration work in TAS5548?

We can't get the DRC (compressor/limiter) to function properly and don't know why, even after setting up the configuration in the PurePath Console. Otherwise we can get an unprocessed audio input on SDIN1 to the DSP output so I know in general the DSP is functional.

Please let me know ASAP, this is very urgent as we're stuck and this is the last bit of design we need to do on this product.

  • Hi

        This two parts have the same function, so the register settings should be no problem to use the same file. Don't change 0x40 register value yourself, the dumped file shouldn't cause any problem. 

        About the DRC not working correctly, can you provide more information about it? Like some test results, we can look into it. 

  • Hi Shadow,

    We are experiencing great difficulty configuring the limiter on this chip. In the PurePath console "Limiter" settings it is not clear nor properly documented how to set up parameter fields. Charles and Robert have tried several times without success. Perhaps we need to address Registers directly? Please advise.

    Limiter settings to be implemented are as follows:

    • EQ
      • LFE
        • EQ#1
          • HP2
          • f=33 Hz
          • Q=2.0
        • EQ #2
          • PEQ
          • f=109 Hz
          • Gain = -3.0 dB
          • Q = 1.0
        • EQ #3
          • PEQ
          • f = 50 Hz
          • Gain = +0.7dB
          • Q = 1.0
        • EQ #4
          • LP1(1st order BW)
          • f = 120 Hz
    • 80Hz
      • EQ #4
        • LP2
        • f = 80 Hz
        • Q = 0.707
      • EQ #5
        • LP2
        • f = 80 Hz
        • Q = 0.707
      • EQ #3
        • PEQ
        • f = 50 Hz
        • Gain = +0.7dB
        • Q = 1.0
      • EQ #2
        • PEQ
        • f=109 Hz
        • Gain = -3.0 dB
        • Q = 1.0
      • EQ#1
        • HP2
        • f=33 Hz
        • Q=2.0
    • External
      • EQ#1
        • HP2
        • f=33 Hz
        • Q=2.0
      • EQ #2
        • PEQ
        • f=109 Hz
        • Gain = -3.0 dB
        • Q = 1.0
      • EQ #3
        • PEQ
        • f = 50 Hz
        • Gain = +0.7dB
        • Q = 1.0
    • Limiter
    • Threshold
      • Anti-clip such that system can just reach full rated output.  THD should reach 3-5% at full engagement
    •  Ratio
      • 100% (Limiter)
    • Attack
      • 4ms
    • Release
      • 40ms
    • "Energy"
      • Use default value
    • System gain
    • System should reach full rated output with -12dBFS input at 33 Hz with volume at maximum and both channels driven.