We want to set WCLK at 44.1KHz with MCLK=24MHz.
However, after we set the parameters, the WCLK output was not correct ( it shows in 38kHz).
The parameters are set as follows: NDAC=8, MDAC=1, DOSR=128, J=4, R=4, P=5, D=704, PLL_CLKIN_DIV=2 (PLL CLK selects MCLK)
Based on formula DAC_FS=DAC_CLKIN/(NDAC*MDAC*DOSR)
The waveform is as below:
Is there anything we miss or something wrong in our calculation so that we could not get 44.1KHz WCLK output?