Hi sir/ madam,
- In our custom project, we are interfacing codec (TLV320AIC3120IRHBT) to Vocoder(AMBE-4020 Full-Duplex BGA) i.e., digital audio data is sent through I2S to vocoder.
- It is said that in codec, mono DAC inputs the mono data from the digital audio data serial interface as the left channel, the right channel, or a mix of the left and right channels as [(L + R) ÷ 2] (page 0 / register 63, bits D5–D4)
- If we consider codec interface is configured to DSP mode and if selection in page 0/ register 63 is either left or right data, do the host processor shall send the same data to both the left and right channels as shown in fig 7-45 : Timing diagram for DSP mode (where N refers to codec interface word length configured using page0/ register 27, bits D5-D4 bits) and DAC considers the data depending on the selection of the channel?
- If codec interface word length is selected to 16 bits and DAC data path is selected as left and right channels ([L+R]/2), does it mean L + R = 16 bits (word length) or L + R = 2 x 16 bits (word length) and how data is considered by DAC?