PCM1802: Rise and fall times

Is this sleve mode? What is the timing you wish to support?

I am using it in slave mode.
I know that the rise and fall times are specified to be less than 10ns as stated above, but I want to use a clock that exceeds 10ns to prevent EMI.
I would like to know if there is a way to use a clock with rise and fall times exceeding 10ns without any problems.

Hi Yamashita-san,

Today is a TI Holiday in the U.S. We will get back to your question by the end of the day tomorrow.

Please do not reply to this message unless we have not been timely in responding to you.

Thank you,
Jeff McPherson

Yes you can use Rise and Fall  times of 20ns . Make sure TBCLK(High) and TBCLK(Low) are greater then 60ns

The Timing is done on voltage levels/(VinH>2V and VinL<0.8V)

Thanks for the reply.
Why are tr and tf specified to be less than 10ns if they can be used without any problem especially without special processing?

This is specified when talking of a maximum BCLK Frequency.

TH+TL+Tr+Tf=TBCLK min

60n+60n+10n+10n=TBCK min

TBCKmin=140ns. 

Thanks for the reply.
If that is the case, I feel that Tr and Tf should be marked as min, but why are they marked as max?

These are old ICs so we do not have access to the people who wrote the datasheet.

It might be that they only speak of a maximum frequency . At that maximum frequency to comply to the High and Low times the Rise and Fall times cannot be larger then the limits set.

The pins are level triggered. Therefore when the pin gets above a certain level, the logic is enabled. With that backdrop a 20ns rise and fall time should work