TLV320ADC3101: Single ended vs Differential noise level

Hi Paul,

While our team starts investigating your questions, can you confirm for me that the orange plot is differential? The label says so, but your questions contradicts that.

Thanks,
Jeff McPherson

Apologies!
The legend is the wrong way around: Orange is single-ended, blue is differential.
Sorry about that.

I like to have some clarifications:

1. You mention that you do a noise test with the inputs floating. When you have inputs floating then they can pickup even 50Hz mains hum from the surrounding. A differential system may cancel to a large extent the 50hz picked on both pins. A single ended input on the other hand shall not do any cancellation.

Why do you do a noise test with Inputs floating? Noise measurements are generally donme with inouts at ground.

2. You mentioned a footnote to register 52. I dont seem to find this . Can you please send me a snapshot of what you see ?

Thank you for the quick response!
Regarding the footnote - I was referring to this one (Should have probably rather called it Table 94.)

I was a bit apprehensive to short the inputs to ground due to the DC bias on those pins (and in case the bias is contributing to the noise as well.)
I guess I could measure it with a capacitor to ground (with a cap value of around 200 pF so that the low pass cut off is just above the frequency of interest?)

I Would suggest to place 2.2u capacitors from input pins to ground. This will ensure that all inputs are at AC Ground when you check fot outputnoise

200p capacitor will allow 50Hz hum to enter amp inputs

Thanks, Sanjay
We'll try with both 2.2uF and 220 pF, in an attempt to identify if the noise is coming from within the ADC (if it is still there with the 2.2uF) or from something driving the pin (removed by 2.2uF, still there by 220pF)...Quietly hoping the 220pF takes is away as well...  I'll report back as soon as we have those results.

Good Luck with the tests

Here is what I found - A bit counter intuitive!

I had a quick look at the time domain data and saw this "settling" , with a time constant around what I would expect with the shunt cap / input resistance combination:

I also re-measured after a couple of minutes of running (to allow it to settle better.)  The decay was an order of magnitude smaller, but the spectrum came out exactly the same

For this test have you placed capacitors on both pins?

You can use the I2C settings given in the datasheet( Page (80,81)

yes, its looks that you measure lower noise with inputs open . This is a bit strange. Are you using your own board?

We set up IN1L(P) and IN1R(M) as single ended inputs to the two ADCs. 
Both inputs had the shunt capacitors. Results from the two looked the same.
This is on our own board (these results, as well as the original differential data shared.)

Are you using the I2C settings given in th datasheet on the pages mentioned?

Our setup is very similar, with the following exceptions:
* We have to use the PLL due to the frequency of our reference clock

* We power up NADC at the end (legacy for synchronization purposes)

* using LJF, with 32b word length

* We are not using MICBIAS

* Dither control has been enabled

* We have played around with ADC gain as part of the investigation

Which pins are you using for the differential connections where you have better performance?

Could you also send me the schematic of the circuit?

We used the following differential pairs initially:
* IN2R(P) + IN3R(M)
* IN2L(P) + IN2L(M)

We are are investigating the single-ended option by connecting to the test points on:
* IN1L(P)
* IN1R(M)

While selecting IN1L(P) are you enabling this bit. Please note that all other pin selections have to be disabled as they work as adders.

The Capacitors to ground need to be placed directly on pin 8 and pin 11. Try larger values such as 47u as a test.

I notice that you use 12nf coupling capacitors to the ADC on differential lines. Can you let me know what kind of signals you like to digitize with this ADC?

We are indeed only enabling the relevant bit and keeping the others turned off.
For the differential case, the signal of interest has a 2 kΩ differential source impedance and is primarily between ~1.6 kHz and ~20 kHz.

For the single-ended application, we would like to go down lower on the bottom end of the spectrum, so we anticipate using a 47 nF coupling capacitor.

Hi Paul,

Sanjay is out of office for the remainder of this week, if we cannot come to a resolution before then he will continue the thread.

The d/s does not spec the noise performance of the device in single-ended vs differential configuration, therefore it is difficult to validate what the expected noise response of the input signal is relative to each other. Are you able to validate your boards dynamic range in each configuration, in comparison to the spec highlighted in 8.5 of the d/s?

In addition, the noise floor variation between SE and Diff is can be attributed to routing, the length of the trace, the coupling cap, and surrounding traces can couple into the input introducing more noise. Please reference this app note on addressing layout concerns:

Regards,

If you are able to provide an FFT response of your input in both configuration, this would be very helpful:

Regards,

Ok, so we got hold of the Evaluation kit to do a comparison on another PCB.
I shorted the inputs (i.e. an AC short to the device with the caps on the PCB)

It seems like we see the same difference between the two setups.

Is there an ADC that you would recommend with better single-ended performance at the low end, or an single-ended to differential amplifier we can use?

Hi Paul,

Unfortunately, if the EVM performance of SE isn't satisfactory then I suggest switching to differential if using the same device.

Paul van der Merwe said:

ingle-ended to differential amplifier we can use?

I can only speak to audio devices so within our audio line drivers portfolio we have DRV134 and DRV135 that seem to fit your application. There are likely a larger variety of amplifiers that can help across other product groups. I suggest presenting a question to the general purpose op-amp group as well.

Paul van der Merwe said:

Is there an ADC that you would recommend with better single-ended performance at the low end

What is the target performance?  Also, this device is the only ADC with an integrated miniDSP so a recommendation depends on if you are using the device's processing capabilities.

Regards,