Other Parts Discussed in Thread: DIT4192
Hi Team,
I had a problem configuring DIT with SRC4382 and it never worked.
First application: I2S->PortA-> (optional SRC)->DIT
Second application: DIR->SRC->PortA
I'm now debugging the first application, where the digital audio source frequency is 1KHz sine wave:
1、I2S BCK=3.072MHz;
2、I2S LRCK = 48KHz;
3、I2S MCK = 6.144MHz;
Program Configuration:
0x03 = 0x01;
0x01 = 0x37;
The DIT output AESOUT was connected to the VM700T test, and the result was 44.1KHz, and the sine wave frequency was 918.8KHz. The sensation is directly divided by a 1.0884 multiplier value, and the calculation shows that 1.0884 = 48KHz/44.1KHz.
I thought there was a problem with the signal source, I used the FPGA to pass this signal source directly to the DIT4192 chip, and then through the DIT4192 output access to the VM700T test, the result is 48KHz sampling, the sine wave frequency is 1KHz, completely normal.
I tried PortA->SRC->DIT->VM700T and the result was still 44.1KHz@918.8KHz.
No workaround has been found at the moment, it can be determined that there is no problem with the signal source,
How do I configure SRC4382?
Could you help check this case? Thanks.
Best Regards,
Cherry