PCM5142: not powering on / automatic PLL not working

Goose Aderholdt

Part Number: PCM5142

Hi,

I am using a 3 wire I2S configuration with the PCM5142. It is in I2C mode. Master device for the I2S and I2C is a QCC5125 (BTM525). I made a PCB for the PCM5142 according to the schematic below and there is no audio. VNEG is at 0.5V instead of -3.3V. DVDD, CPVDD, and AVDD are at 3.3V. LDO is 1.9V. The issue is not with the source (QCC5125). I checked the clock outputs and the I2C bus of the master source and they are working fine. DOUT is also outputting data to the DIN of the PCM5142. Any help is appreciated.

Schematic:

PPS:

WCLK clock:

BCLK clock:

PPS code:

8055.base_main_Rate48.cfg

over 1 year ago

0 Arash Loloee over 1 year ago

TI__Mastermind 26981 points

Hello Goose,

I noticed you have different cap values at the 2 outputs. Also I did a quick calculation and with 100nF, you would have a Fc=1.5915 KHz and with 27nF, your filter would have Fc=5.8946KHz. Please check the audio freq bandwidth you are considering. I recommend to use 470Ohm+2.2nF on both.
You could use smaller cap, like 10uF, on VCOM
If you are using the internal LDO (Output from the on-chip LDO) , then a 0.1-µF decoupling cap should be used with
If you are interested you can take a look at TI app note SLVA689–February 2015 for more accurate calculation of pull up resistors for I2C signals
From your LRCK and BIT clk it seems you are using a 32bit depth per channel with 48KHz LRCLK. Is this what you plan?
If you are setting the device in master mode then SCK is an input and BCK/LRCK are outputs. Please refer to section 8.3.6.6 Clock Master Mode from Audio Rate Master Clock. I don't see the SCK rate in your post. Can you verify you have provided SCK
The PCM514x has an on-chip PLL with fractional multiplication to generate the clock frequency needed by various blocks inside the IC such as audio DAC and Negative Charge Pump, Seems the clk for charge pumps is not correct and that might be because the coefficient for PLL is not set correctly. I can not look at the attached cfg file ( seems it is blocked for this type of file!) Please refer to Table 133. (Recommended Clock Divider Settings for PLL as Master Clock (VCOM Mode)) and make sure your register set up for the given sck is correct.

Regards,

Arash

0 Goose Aderholdt over 1 year ago in reply to Arash Loloee

Prodigy 60 points

Hi Arash,

Thank you for your reply. The output caps values for C28 and C29 are typos. Both are actually 2.7nF in the PCB. My apologies for the confusion. I only use 48kHz sample rate so this configuration should do fine.

The master clock SCK is unused because according to the PCM5142 datasheet, it is not needed for the 3-wire I2S configuration (auto PLL config).

How were you able to determine that the outputs were 32-bits? The master device (QCC5125) actually only outputs 48kHz, 24-bit I2S:

The PCM5142 is being used in slave mode. However, with the correct clocks, the PCM5142 fails to automatically configure the PLL. Below is a .txt file of the PPS code since the .cfg caused problems:

base_main_Rate48.txt

#			--------------------------------------------------------------- page 1 is selected
w 98 00 01
#			# reg[1][3] = 0x4
w 98 03 04
#			--------------------------------------------------------------- page 0 is selected
w 98 00 00
#			# reg[0][0x3] = 0x11
w 98 03 11
#			# reg[0][2] = 0x10
w 98 02 10
#			--------------------------------------------------------------- page 44 is selected
w 98 00 2c
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 0
w 98 08 ff
#			 (Bit 23-16)
w 98 09 ff
#			 (Bit 15-8)
w 98 0a ff
#			 (Bit 7-0)
w 98 0b 00
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 1
w 98 0c 80
#			 (Bit 23-16)
w 98 0d 00
#			 (Bit 15-8)
w 98 0e 00
#			 (Bit 7-0)
w 98 0f 00
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 2
w 98 10 40
#			 (Bit 23-16)
w 98 11 00
#			 (Bit 15-8)
w 98 12 00
#			 (Bit 7-0)
w 98 13 00
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 3
w 98 14 7f
#			 (Bit 23-16)
w 98 15 ff
#			 (Bit 15-8)
w 98 16 ff
#			 (Bit 7-0)
w 98 17 00
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 4
w 98 18 00
#			 (Bit 23-16)
w 98 19 00
#			 (Bit 15-8)
w 98 1a 00
#			 (Bit 7-0)
w 98 1b 00
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 5
w 98 1c 00
#			 (Bit 23-16)
w 98 1d 80
#			 (Bit 15-8)
w 98 1e 00
#			 (Bit 7-0)
w 98 1f 00
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 6
w 98 20 13
#			 (Bit 23-16)
w 98 21 80
#			 (Bit 15-8)
w 98 22 00
#			 (Bit 7-0)
w 98 23 00
#			--------------------------------------------------------------- page 152 is selected
w 98 00 98
#			 (Bit 31-24) ------------ MSB DAC INST No. 0
w 98 08 00
#			 (Bit 23-16)
w 98 09 00
#			 (Bit 15-8)
w 98 0a 00
#			 (Bit 7-0)
w 98 0b 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 1
w 98 0c 00
#			 (Bit 23-16)
w 98 0d 00
#			 (Bit 15-8)
w 98 0e 00
#			 (Bit 7-0)
w 98 0f 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 2
w 98 10 00
#			 (Bit 23-16)
w 98 11 10
#			 (Bit 15-8)
w 98 12 00
#			 (Bit 7-0)
w 98 13 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 3
w 98 14 00
#			 (Bit 23-16)
w 98 15 10
#			 (Bit 15-8)
w 98 16 04
#			 (Bit 7-0)
w 98 17 01
#			 (Bit 31-24) ------------ MSB DAC INST No. 4
w 98 18 00
#			 (Bit 23-16)
w 98 19 60
#			 (Bit 15-8)
w 98 1a 08
#			 (Bit 7-0)
w 98 1b 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 5
w 98 1c 00
#			 (Bit 23-16)
w 98 1d 60
#			 (Bit 15-8)
w 98 1e 08
#			 (Bit 7-0)
w 98 1f 01
#			 (Bit 31-24) ------------ MSB DAC INST No. 6
w 98 20 00
#			 (Bit 23-16)
w 98 21 00
#			 (Bit 15-8)
w 98 22 00
#			 (Bit 7-0)
w 98 23 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 7
w 98 24 00
#			 (Bit 23-16)
w 98 25 40
#			 (Bit 15-8)
w 98 26 04
#			 (Bit 7-0)
w 98 27 0b
#			 (Bit 31-24) ------------ MSB DAC INST No. 8
w 98 28 00
#			 (Bit 23-16)
w 98 29 40
#			 (Bit 15-8)
w 98 2a 04
#			 (Bit 7-0)
w 98 2b 57
#			 (Bit 31-24) ------------ MSB DAC INST No. 9
w 98 2c 00
#			 (Bit 23-16)
w 98 2d 60
#			 (Bit 15-8)
w 98 2e 17
#			 (Bit 7-0)
w 98 2f fb
#			 (Bit 31-24) ------------ MSB DAC INST No. 10
w 98 30 00
#			 (Bit 23-16)
w 98 31 00
#			 (Bit 15-8)
w 98 32 00
#			 (Bit 7-0)
w 98 33 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 11
w 98 34 00
#			 (Bit 23-16)
w 98 35 00
#			 (Bit 15-8)
w 98 36 00
#			 (Bit 7-0)
w 98 37 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 12
w 98 38 00
#			 (Bit 23-16)
w 98 39 30
#			 (Bit 15-8)
w 98 3a f0
#			 (Bit 7-0)
w 98 3b 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 13
w 98 3c 01
#			 (Bit 23-16)
w 98 3d 14
#			 (Bit 15-8)
w 98 3e 83
#			 (Bit 7-0)
w 98 3f cc
#			 (Bit 31-24) ------------ MSB DAC INST No. 14
w 98 40 00
#			 (Bit 23-16)
w 98 41 00
#			 (Bit 15-8)
w 98 42 00
#			 (Bit 7-0)
w 98 43 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 15
w 98 44 00
#			 (Bit 23-16)
w 98 45 60
#			 (Bit 15-8)
w 98 46 1b
#			 (Bit 7-0)
w 98 47 fb
#			 (Bit 31-24) ------------ MSB DAC INST No. 16
w 98 48 00
#			 (Bit 23-16)
w 98 49 00
#			 (Bit 15-8)
w 98 4a 00
#			 (Bit 7-0)
w 98 4b 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 17
w 98 4c 00
#			 (Bit 23-16)
w 98 4d 00
#			 (Bit 15-8)
w 98 4e 00
#			 (Bit 7-0)
w 98 4f 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 18
w 98 50 00
#			 (Bit 23-16)
w 98 51 30
#			 (Bit 15-8)
w 98 52 f0
#			 (Bit 7-0)
w 98 53 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 19
w 98 54 01
#			 (Bit 23-16)
w 98 55 14
#			 (Bit 15-8)
w 98 56 83
#			 (Bit 7-0)
w 98 57 cc
#			 (Bit 31-24) ------------ MSB DAC INST No. 20
w 98 58 00
#			 (Bit 23-16)
w 98 59 00
#			 (Bit 15-8)
w 98 5a 00
#			 (Bit 7-0)
w 98 5b 00
#			 (Bit 31-24) ------------ MSB DAC INST No. 21
w 98 5c 00
#			 (Bit 23-16)
w 98 5d 6f
#			 (Bit 15-8)
w 98 5e ec
#			 (Bit 7-0)
w 98 5f 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 22
w 98 60 00
#			 (Bit 23-16)
w 98 61 6f
#			 (Bit 15-8)
w 98 62 ec
#			 (Bit 7-0)
w 98 63 03
#			 (Bit 31-24) ------------ MSB DAC INST No. 23
w 98 64 00
#			 (Bit 23-16)
w 98 65 30
#			 (Bit 15-8)
w 98 66 00
#			 (Bit 7-0)
w 98 67 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 24
w 98 68 00
#			 (Bit 23-16)
w 98 69 30
#			 (Bit 15-8)
w 98 6a 00
#			 (Bit 7-0)
w 98 6b 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 25
w 98 6c 00
#			 (Bit 23-16)
w 98 6d 6f
#			 (Bit 15-8)
w 98 6e ec
#			 (Bit 7-0)
w 98 6f 04
#			 (Bit 31-24) ------------ MSB DAC INST No. 26
w 98 70 00
#			 (Bit 23-16)
w 98 71 6f
#			 (Bit 15-8)
w 98 72 ec
#			 (Bit 7-0)
w 98 73 05
#			 (Bit 31-24) ------------ MSB DAC INST No. 27
w 98 74 00
#			 (Bit 23-16)
w 98 75 30
#			 (Bit 15-8)
w 98 76 00
#			 (Bit 7-0)
w 98 77 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 28
w 98 78 00
#			 (Bit 23-16)
w 98 79 30
#			 (Bit 15-8)
w 98 7a 00
#			 (Bit 7-0)
w 98 7b 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 29
w 98 7c 00
#			 (Bit 23-16)
w 98 7d 6f
#			 (Bit 15-8)
w 98 7e ec
#			 (Bit 7-0)
w 98 7f 06
#			--------------------------------------------------------------- page 153 is selected
w 98 00 99
#			 (Bit 31-24) ------------ MSB DAC INST No. 30
w 98 08 00
#			 (Bit 23-16)
w 98 09 6f
#			 (Bit 15-8)
w 98 0a ec
#			 (Bit 7-0)
w 98 0b 07
#			 (Bit 31-24) ------------ MSB DAC INST No. 31
w 98 0c 00
#			 (Bit 23-16)
w 98 0d 30
#			 (Bit 15-8)
w 98 0e 00
#			 (Bit 7-0)
w 98 0f 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 32
w 98 10 00
#			 (Bit 23-16)
w 98 11 30
#			 (Bit 15-8)
w 98 12 00
#			 (Bit 7-0)
w 98 13 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 33
w 98 14 00
#			 (Bit 23-16)
w 98 15 6f
#			 (Bit 15-8)
w 98 16 ec
#			 (Bit 7-0)
w 98 17 08
#			 (Bit 31-24) ------------ MSB DAC INST No. 34
w 98 18 00
#			 (Bit 23-16)
w 98 19 6f
#			 (Bit 15-8)
w 98 1a ec
#			 (Bit 7-0)
w 98 1b 09
#			 (Bit 31-24) ------------ MSB DAC INST No. 35
w 98 1c 00
#			 (Bit 23-16)
w 98 1d 30
#			 (Bit 15-8)
w 98 1e 00
#			 (Bit 7-0)
w 98 1f 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 36
w 98 20 00
#			 (Bit 23-16)
w 98 21 30
#			 (Bit 15-8)
w 98 22 00
#			 (Bit 7-0)
w 98 23 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 37
w 98 24 00
#			 (Bit 23-16)
w 98 25 6f
#			 (Bit 15-8)
w 98 26 f0
#			 (Bit 7-0)
w 98 27 4e
#			 (Bit 31-24) ------------ MSB DAC INST No. 38
w 98 28 00
#			 (Bit 23-16)
w 98 29 6f
#			 (Bit 15-8)
w 98 2a f0
#			 (Bit 7-0)
w 98 2b 4f
#			 (Bit 31-24) ------------ MSB DAC INST No. 39
w 98 2c 00
#			 (Bit 23-16)
w 98 2d 30
#			 (Bit 15-8)
w 98 2e 04
#			 (Bit 7-0)
w 98 2f 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 40
w 98 30 00
#			 (Bit 23-16)
w 98 31 30
#			 (Bit 15-8)
w 98 32 04
#			 (Bit 7-0)
w 98 33 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 41
w 98 34 00
#			 (Bit 23-16)
w 98 35 6f
#			 (Bit 15-8)
w 98 36 f0
#			 (Bit 7-0)
w 98 37 50
#			 (Bit 31-24) ------------ MSB DAC INST No. 42
w 98 38 00
#			 (Bit 23-16)
w 98 39 6f
#			 (Bit 15-8)
w 98 3a f0
#			 (Bit 7-0)
w 98 3b 51
#			 (Bit 31-24) ------------ MSB DAC INST No. 43
w 98 3c 00
#			 (Bit 23-16)
w 98 3d 30
#			 (Bit 15-8)
w 98 3e 04
#			 (Bit 7-0)
w 98 3f 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 44
w 98 40 00
#			 (Bit 23-16)
w 98 41 30
#			 (Bit 15-8)
w 98 42 04
#			 (Bit 7-0)
w 98 43 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 45
w 98 44 00
#			 (Bit 23-16)
w 98 45 6f
#			 (Bit 15-8)
w 98 46 f0
#			 (Bit 7-0)
w 98 47 52
#			 (Bit 31-24) ------------ MSB DAC INST No. 46
w 98 48 00
#			 (Bit 23-16)
w 98 49 6f
#			 (Bit 15-8)
w 98 4a f0
#			 (Bit 7-0)
w 98 4b 53
#			 (Bit 31-24) ------------ MSB DAC INST No. 47
w 98 4c 00
#			 (Bit 23-16)
w 98 4d 30
#			 (Bit 15-8)
w 98 4e 04
#			 (Bit 7-0)
w 98 4f 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 48
w 98 50 00
#			 (Bit 23-16)
w 98 51 30
#			 (Bit 15-8)
w 98 52 04
#			 (Bit 7-0)
w 98 53 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 49
w 98 54 00
#			 (Bit 23-16)
w 98 55 6f
#			 (Bit 15-8)
w 98 56 f0
#			 (Bit 7-0)
w 98 57 54
#			 (Bit 31-24) ------------ MSB DAC INST No. 50
w 98 58 00
#			 (Bit 23-16)
w 98 59 6f
#			 (Bit 15-8)
w 98 5a f0
#			 (Bit 7-0)
w 98 5b 55
#			 (Bit 31-24) ------------ MSB DAC INST No. 51
w 98 5c 00
#			 (Bit 23-16)
w 98 5d 30
#			 (Bit 15-8)
w 98 5e 04
#			 (Bit 7-0)
w 98 5f 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 52
w 98 60 00
#			 (Bit 23-16)
w 98 61 30
#			 (Bit 15-8)
w 98 62 04
#			 (Bit 7-0)
w 98 63 02
#			 (Bit 31-24) ------------ MSB DAC INST No. 53
w 98 64 01
#			 (Bit 23-16)
w 98 65 10
#			 (Bit 15-8)
w 98 66 03
#			 (Bit 7-0)
w 98 67 ff
#			--------------------------------------------------------------- page 0 is selected
w 98 00 00
#			# reg[0][0x2b] = 0x1f
w 98 2b 1f
#			--------------------------------------------------------------- page 44 is selected
w 98 00 2c
#			# reg[ 44][  1] = 0x00	; Disable adaptive mode for DAC
> 00
#			--------------------------------------------------------------- page 0 is selected
w 98 00 00
#			# reg[0][2] = 0
w 98 02 00
#			# reg[0][0x8] = 0x4
w 98 08 04
#			# reg[0][0x53] = 0x7
w 98 53 07
#			# reg[0][0x3] = 0x0
w 98 03 00

Thank you

Goose

+1 Arash Loloee over 1 year ago in reply to Goose Aderholdt

TI__Mastermind 26981 points

Hello,

2,7nF should be fine for those caps.

If you are using the part as slave mode 3wire I2S, not master, then SCK is not needed and you can use BCK.( refer to Figure 65. PCM514x Clock Distribution Tree) to set up the device

BCK can be calculated as #of channels x channel depth(bit) x LRCLK , So for 3.07MHz BCK and 48K sample rate and stereo (2 channels) , then the assigned (allocated) channel depth is 32. Of course you can send a 24 bit data with 8 bit padding. I use AP and here is a screenshot of it. Note the allocated channel depth is 32 but I am sending a 24bit data to this slot so AP is padding it with 8 bits.

I see you are using BCK scale factor of 64, which I think it is setting the channel allocation to 32Bit (x2) and you are sending 24bit data; so I think it is ok.

One thing that you need to make sure is data format is correct. In your script I see w 98 28 00 , which means your data is I2S format but in the screenshot that you have, it is LJ. please verify they are matching ( i am not familiar with the tool you are using so it might be correct, but just double check) The best way is the plot BCK,LRCK and Din at the same time and check their edges to make sure it is I2S format (refer to Figure 16 of datasheet)

If everything is correct then you should check the PLL coefficient as I mentioned before. Please refer to Table 34. PLL Configuration Registers and section 8.3.6.5 for PLL Calculation examples.

Personally, I like to provide SCK first and disable the PLL and check the functionality of the DAC , once it is working, then I remove SCK and engage the PLL, This way, if DAC doesn't work anymore then I know the issue is the PLL set up/coefficient. You can read the PLL coefficient registers from your script and then use the equations in this section to see if everything is as you expect.

Regards,

Arash

+1 Goose Aderholdt over 1 year ago in reply to Arash Loloee

Prodigy 60 points

Hi Arash,

Thanks for the help. Regardless, I was unable to get the automatic PLL to work. Instead, I wrote the PLL data manually and then everything worked as expected. Also, thanks for pointing out the left-justified setting. That helped me solve a subsequent problem.

Goose

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PCM5142: not powering on / automatic PLL not working