I'm using a tlv320aic12K codec in standalone slave mode.
I haven't found any timing regardings the /PWRDN sequence.
When I pull high the /PWRDN I have to wait for a delay, before bringing the codec out of reset and then configure it using the I2C bus.
Currently I'm able to write the registers and check their values with a read, but depending of the delay between the power up and the I2C access the CODEC configuration can be incorrect (random audio sampling or noisy output). This can be fixed either by inserting a delay after power up (PWRDN pull high) or by sending again the codec configuration.
I really need to kwon the expected dealy between the power up and the first I2C access.
For information I respect the RESET timing and consideration decribe in "§Software and Hardware Reset" + "Figure 1 Hardware Reset Timing"
Regards