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TLV320AIC3254-Q1: 20-200Hz noise issue

Kevin Huang8
Genius 3765 points
Part Number: TLV320AIC3254-Q1

Tool/software:

Hi Team,

The following is a picture of THD and THD+N measured by the customer using Audio Prosicion.
(1) Taking THD (Figure 1) as an example, it is reduced to about 0.02% after 200Hz, but I still cannot effectively reduce it from 20 to 200Hz.

(2) THD+N (Figure 2) After increasing the gain (Vrms is about 0.7V) the overall noise is improved. Comparing the part in Figure 3 is measured when the gain is very small (Vrms is only about 80mV) ,
It is hoped that the overall THD can be between 0.05-0.02%, and the THD+N part should be below -70dB.


Are there any suggestions for adjustments in the wiring or registers?

Codec_I2C_FirstPlay.txt 
/* First Play */
I2C: tlv320aic_page_select page id(0)
I2C: tlv320aic_write_reg reg_addr(00) reg_data(00)
I2C: tlv320aic_write_reg reg_addr(01) reg_data(01)  /* SW Reset (Page0/Reg1/Data:0x01)*/
I2C: tlv320aic_page_select page id(0)
I2C: tlv320aic_write_reg reg_addr(00) reg_data(00)
I2C: tlv320aic_write_reg reg_addr(1B) reg_data(00)
I2C: tlv320aic_page_select page id(0)
I2C: tlv320aic_write_reg reg_addr(00) reg_data(00)  /* Set CLK.... */
I2C: tlv320aic_write_reg reg_addr(04) reg_data(07)
I2C: tlv320aic_write_reg reg_addr(06) reg_data(14)
I2C: tlv320aic_write_reg reg_addr(07) reg_data(00)
I2C: tlv320aic_write_reg reg_addr(08) reg_data(00)
I2C: tlv320aic_write_reg reg_addr(05) reg_data(93)
I2C: tlv320aic_write_reg reg_addr(0B) reg_data(85)
I2C: tlv320aic_write_reg reg_addr(0C) reg_data(83)
I2C: tlv320aic_write_reg reg_addr(0D) reg_data(00)
I2C: tlv320aic_write_reg reg_addr(0E) reg_data(80)
I2C: tlv320aic_page_select page id(1)
I2C: tlv320aic_write_reg reg_addr(00) reg_data(01)
I2C: tlv320aic_write_reg reg_addr(01) reg_data(08)
I2C: tlv320aic_write_reg reg_addr(02) reg_data(01)
I2C: tlv320aic_write_reg reg_addr(47) reg_data(32)
I2C: tlv320aic_write_reg reg_addr(7B) reg_data(01)
I2C: tlv320aic_page_select page id(0)
I2C: tlv320aic_write_reg reg_addr(00) reg_data(00)
I2C: tlv320aic_write_reg reg_addr(3C) reg_data(02)  /* DAC Signal Processing Block PRB_P2 */
I2C: tlv320aic_page_select page id(44)
I2C: tlv320aic_write_reg reg_addr(00) reg_data(2C)
I2C: tlv320aic_write_reg reg_addr(01) reg_data(04)  /* Adaptive Filtering enabled for DAC */
I2C: tlv320aic_page_select page id(1)
I2C: tlv320aic_write_reg reg_addr(00) reg_data(01)
I2C: tlv320aic_write_reg reg_addr(0E) reg_data(08)
I2C: tlv320aic_write_reg reg_addr(0F) reg_data(08)
I2C: tlv320aic_write_reg reg_addr(12) reg_data(3A)  /* LOL driver gain */
I2C: tlv320aic_write_reg reg_addr(13) reg_data(3A)
I2C: tlv320aic_write_reg reg_addr(09) reg_data(0C)  /* Power up LOL/LOR drivers */
I2C: tlv320aic_page_select page id(0)
I2C: tlv320aic_write_reg reg_addr(00) reg_data(00)
I2C: tlv320aic_write_reg reg_addr(3F) reg_data(D4)
I2C: tlv320aic_write_reg reg_addr(40) reg_data(0C)
I2C: tlv320aic_page_select page id(0)
I2C: tlv320aic_write_reg reg_addr(00) reg_data(00)
I2C: tlv320aic_write_reg reg_addr(41) reg_data(82)  /* Digital Volume Control */
I2C: tlv320aic_write_reg reg_addr(42) reg_data(82)
I2C: tlv320aic_page_select page id(0)
I2C: tlv320aic_write_reg reg_addr(00) reg_data(00)
I2C: tlv320aic_write_reg reg_addr(40) reg_data(00)
I2C: tlv320aic_write_reg reg_addr(41) reg_data(E4)
I2C: tlv320aic_write_reg reg_addr(42) reg_data(E4)

  • 0
    TI__Mastermind 33570 points

    Hi Kevin,

    Can you tell me what type of capacitor is used for C193 and C197?

    Also I don't think I follow your test set up. 0.7Vrms is higher than the supported full scale output of the line out drivers. This should've caused clipping which will create harmonic distortions. Can you share the FFT of the signal at 1kHz?

    You should be testing the THD+N such that the output is equal to -1dBFS. This gives you the strongest signal to noise ratio. Lower input signals will result in worse THD+N performance.

    Best regards,
    Jeff McPherson

  • 0 in reply to Jeff McPherson
    Genius 3765 points

    Hi Jeff,

    C193 and C197 is 0603 package, and the test process report is as follows

    Audio (002) (1).pdf

  • 0 in reply to Kevin Huang8
    TI__Mastermind 33570 points

    Hi Kevin,

    Thank you for the report.

    What I mean by capacitor type is if C193 and C197 are ceramic type capacitors? Ceramic capacitors degrade THD+N at low frequencies which is what your plot reminds me of.

    My next recommendation is to measure where exactly the poor THD+N occurs in the signal chain. For example, measure the codec output at C196, C99, and C211. Since there are multiple ICs in this signal flow, the exact failure point needs to be identified. 

    Best regards,
    Jeff McPherson