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TPA3112D1-Q1: Please share the schematic diagram of the demo board and Usage problem

Part Number: TPA3112D1-Q1

Tool/software:

1. Can the voltage values of PVCC and AVCC be different? PVCC uses the filtered vehicle power supply of 9~16V, is it OK to use a constant 5V power supply for AVCC? What is the purpose of the connection between PVCC and AVCC via a 10 ohm resistor in the figure below?

2. What is the function of this part of the circuit? Why is the PLIMIT pin input designed this way?

3, is the chip output power only related to the voltage of the PLIMIT pin? GAIN1, GAIN0 are grounded, in the case of 12V voltage, 2Ω internal resistance speaker, how much power can be? According to the schematic diagram above, the PLIMIT input is AC signal, will the output power of the product also change with it? What happens when the output power exceeds the limit?

4. Is the output of the fault pin analog or digital? What is the logic behind the connection between fault and SD?

  • Hi

    1. Can the voltage values of PVCC and AVCC be different? PVCC uses the filtered vehicle power supply of 9~16V, is it OK to use a constant 5V power supply for AVCC? What is the purpose of the connection between PVCC and AVCC via a 10 ohm resistor in the figure below?

    Could provide different voltage. But 5V is too low for AVCC, can't provide enough internal voltage for the driver. Suggested Min value would be 8V.

    10ohm resistance is used between PVCC and AVCC to keep high frequency class-D noise from entering the linear input amplifier. 

    2. What is the function of this part of the circuit? Why is the PLIMIT pin input designed this way?

    PLIMIT is just a protection function. Connect PLIMIT to GVDD means no limitation.

    According to the schematic diagram above, the PLIMIT input is AC signal,

    Not understand why would you get this conclusion. GVDD is fixed 7V voltage. 

    The output will always a fixed Gain with your input signal, which is 20dB since you connect both Gain pins to GND. If the output is too large and higher than the limit, clip would happen.

    4. Is the output of the fault pin analog or digital? What is the logic behind the connection between fault and SD?

    SD pin is input logic, high level should follow AVCC.  FAULT is open drain output, follow  your external circuit.