Tool/software:
Dear Team,
My customer is considering to use Audio ADC PCM1809 in their audio circuit configuration.
In the Controller mode, MCLK is inputted into the PCM1809 from the Host SoC.
The datasheet describes as follows,
- Controller mode operation supported using a system clock of 256 × fs or 512 × fs
- In the controller mode of operation, the device uses the MD1 pin (as the system clock, MCLK) as the reference input clock source with a supported system clock frequency option of either 256 × fs or 512 × fs as configured using the MD0 pin. controller mode supports fs rates of 44.1kHz and 48kHz.
Q1: The MCLK must be 256 × fs or 512 × fs, right? Are there any requirement specification for MCLK accuracy?
Q2: If the customer requires fs rate of not only 44.1kHz and 48kHz, but also 32kHz, can the PCM1809 support in the controller mode?
The datasheet describes the recommended operating condition as follow,
Q3: Although 512 x 48kHz = 24.576MHz, wha is this maximum 36.864MHz?
The datasheet describes the electrical characteristics of ADC as follow,
Q4: Is this specification only in Target mode?
I look forward to your support.
Thank you.
Best Regards,
Koshi Ninomiya
