Tool/software:
Hello,
I am working with the TAS2505 and am only hear noise when sending I2S data to the TAS2505.
I can see the I2S data going into the device with a WCLK frequency of: ~44KHz and a BCLK frequency of: ~2.8MHz and MCLK frequency of: 11.289MHz. This results in 32 bits being transmitted per WCLK pulse.
On the output I am able to see that the speaker P and M are outputting a PWM like signal, so the analog portion of the chip must be working.
Here is the configuration I am using. I am able to confirm that the TAS2505 is in the correct state with I2C read operations on the same registers.
# Page switch to Page 0
W 30 00 00
# Assert Software reset (P0, R1, D0=1)
W 30 01 01
# Page Switch to Page 1
W 30 00 01
# LDO output programmed as 1.8V and Level shifters powered up. (P1, R2, D5-D4=00, D3=0)
W 30 02 00
# Page switch to Page 0
W 30 00 00
# codec_clkin = MCLK, MCLK is 11.2896MHz (P0, R4, D1-D0=03)
W 30 04 00 # Change codec clkin to mclk
W 30 0B 82 # NDAC = 2 for no PLL
W 30 0C 81 #NDAC = 1 for no PLL
# DAC OSR(9:0)-> DOSR=128 (P0, R12, D1-D0=00)
W 30 0D 00
# DAC OSR(9:0)-> DOSR=128 (P0, R13, D7-D0=10000000)
W 30 0E 80
# Codec Interface control Word length = 16bits, BCLK&WCLK inputs, LJF mode. (P0, R27, D7-D6=00, D5-D4=00, D3-D2=00)
W 30 1B C0
# Data slot offset 00 (P0, R28, D7-D0=0000)
W 30 1C 00
# Dac Instruction programming PRB #2 for Mono routing. Type interpolation (x8) and 3 programmable Biquads. (P0, R60, D4-D0=0010)
W 30 3C 02
# Page switch to Page 0
W 30 00 00
# DAC powered up, Soft step 1 per Fs. (P0, R63, D7=1, D5-D4=01, D3-D2=00, D1-D0=00)
W 30 3F 90
# DAC digital gain 0dB (P0, R65, D7-D0=00000000)
W 30 41 00
# DAC volume not muted. (P0, R64, D3=0, D2=1)
W 30 40 04
# Page Switch to Page 1
W 30 00 01
# Master Reference Powered on (P1, R1, D4=1)
W 30 01 10
# Output common mode for DAC set to 0.9V (default) (P1, R10)
W 30 0A 00
# Mixer P output is connected to HP Out Mixer (P1, R12, D2=1)
W 30 0C 04
# HP Voulme, 0dB Gain (P1, R22, D6-D0=0000000)
W 30 16 00
# No need to enable Mixer M and Mixer P, AINL Voulme, 0dB Gain (P1, R24, D7=1, D6-D0=0000000)
W 30 18 00
# Power up HP (P1, R9, D5=1)
W 30 09 20
# Unmute HP with 0dB gain (P1, R16, D4=1)
W 30 10 00
# SPK attn. Gain =0dB (P1, R46, D6-D0=000000)
W 30 2E 00
# SPK driver Gain=6.0dB (P1, R48, D6-D4=001)
W 30 30 10
# SPK powered up (P1, R45, D1=1)
W 30 2D 02
Please note that this configuration doesn't use the PLL, but I have also tried using the PLL as the codec_clkin with no luck.
Thank you,
Dawson
