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Original question:

PCM6260-Q1: Differential Gain adjust

PCM6260-Q1: Channel gain config failure for PCM6260-Q1

Jass Jin
Intellectual 1860 points
Part Number: PCM6260-Q1

Tool/software:

Hi expert,

I see from datasheet that we need config ADC channel gain before power-up.

How to understand power-up? We need config channel gain after enable micbias/en channel?

My customer is using external micbias? Do we need to config channel gain before external LDO power-up?

Thanks!

  • 0
    TI__Mastermind 33610 points

    Hi Jass,

    The instruction is to configure channel gain "before powering up the ADC channel..."

    ADC channel is powered up by using register 0x75 bit 6. All enables (micbias, channel, etc) should also be set before power up of the ADC channel.

    I recommend powering up the ADC before powering up the external MICBIAS. As long as the power supplies are stable, then no extra register settings are required before powering up external LDO.

    Best regards,
    Jeff McPherson

  • 0 in reply to Jeff McPherson
    TI__Intellectual 1860 points

    Hi Jeff,

    Do we need to config 0x74/75 for normal work? My customer does not have this configuration, but the system works.

    Here is there code:

        { 0x00, sizeof(regInitDataPage0), &(regInitDataPage0[0]),  0 }, /* set page number to 0. */

        { 0x01, sizeof(regInitDataBlock2), &(regInitDataBlock2[0]),  2 }, /* reset device and delay 2ms */

        { 0x00, sizeof(regInitDataPage0), &(regInitDataPage0[0]),  0 }, /* set page number to 0. afater delay need set page 0 again*/

        { 0x02, sizeof(regInit_SLEEP_CFG), &(regInit_SLEEP_CFG[0]),  5 },

     

        { 0x3D, sizeof(regInit_CH1_CFG1), &(regInit_CH1_CFG1[0]),  0 },

        { 0x42, sizeof(regInit_CH2_CFG1), &(regInit_CH2_CFG1[0]),  0 },

        { 0x47, sizeof(regInit_CH3_CFG1), &(regInit_CH3_CFG1[0]),  0 },

        { 0x4C, sizeof(regInit_CH4_CFG1), &(regInit_CH4_CFG1[0]),  0 },

        { 0x51, sizeof(regInit_CH5_CFG1), &(regInit_CH5_CFG1[0]),  0 },

        { 0x56, sizeof(regInit_CH6_CFG1), &(regInit_CH6_CFG1[0]),  0 },

     

        { 0x15, sizeof(regInit_ASI_STS), &(regInit_ASI_STS[0]),  0 },

        { 0x2C, sizeof(regInit_INT_LTCH0), &(regInit_INT_LTCH0[0]),  0 },

        { 0x3A, sizeof(regInit_MBDIAG_CFG2), &(regInit_MBDIAG_CFG2[0]),  0 },

        { 0x3B, sizeof(regInit_BIAS_CFG), &(regInit_BIAS_CFG[0]),  0 },

    #if (TARGET_PRODUCT == AUDIO_ADC_SERVER_VARIANT_P12L)

        //for diag

        { 0x66, sizeof(regInit_DIAG_CFG3), &(regInit_DIAG_CFG3[0]),  0 }, //change the short to ground detect to 120mv

        { 0x2a, sizeof(regInit_DIAG_CFG1), &(regInit_DIAG_CFG1[0]),  0 },

    #else

    #endif

        { 0x3C, sizeof(regInit_CH1_CFG0), &(regInit_CH1_CFG0[0]),  0 },

        { 0x41, sizeof(regInit_CH2_CFG0), &(regInit_CH2_CFG0[0]),  0 },

        { 0x46, sizeof(regInit_CH3_CFG0), &(regInit_CH3_CFG0[0]),  0 },

        { 0x4B, sizeof(regInit_CH4_CFG0), &(regInit_CH4_CFG0[0]),  0 },

        { 0x50, sizeof(regInit_CH5_CFG0), &(regInit_CH5_CFG0[0]),  0 },

        { 0x55, sizeof(regInit_CH6_CFG0), &(regInit_CH6_CFG0[0]),  0 },

     

        { 0x07, sizeof(regInitDataBlock3), &(regInitDataBlock3[0]),  0 },

        { 0x0B, sizeof(regInitDataBlock4), &(regInitDataBlock4[0]),  0 },

        { 0x13, sizeof(regInitDataBlock5), &(regInitDataBlock5[0]), 10 },

        { 0x73, sizeof(regInitDataBlock6), &(regInitDataBlock6[0]),  10 },

  • 0 in reply to Jass Jin
    TI__Mastermind 33610 points

    Hi Jass,

    Yes 0x74 and 0x75 are required. By default all ADC channels are disabled (0x74) and powered down (0x75). It is impossible for the system to work without these registers being set. The customer might be setting the registers elsewhere?

    Best regards,
    Jeff McPherson