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PCM1809: No SDOUT signal

Part Number: PCM1809

Tool/software:

Dear Expert,

One customer is evaluating the PCM1809 but found SDOUT no output.  Could you help to adv what may have gone wrong? 

Below please find customer's schematic and brief test conditions:

PCM1809 as main clock, BCLK (6.1MHz) & RCLK(96kHz) are normal.

IOVDD & AVDD =3.3V

Pin 14 DREG=1.5V normal

Pin 16 AVDD=3.3V normal

Pin 17 AREG=1.8V normal

Pin 18 VREF=2.V normal.

 

  • Hi Stanley,

    Our expert on this device is out of office for the holidays and will return after New Year's Day.

    Thank you for your patience,
    Jeff McPherson

  • Hi Stanley,

    Please follow EVM reference for decoupling capacitor values:

    Please ensure the rails supplied to the device are stable (1.8V or 3.3V).

    Ensure the input signal is within 2Vrms. When AC coupled, the voltage common mode is set by the device, when DC coupled the common mode voltage must be driven by signal source. This bias should be 1.375V - 1.65V.

    Confirm 24.576MHz MCLK input

    FSYNC provided by device should be confirmed 96kHz.