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TAS6424M-Q1: Maximum output power vs Input voltage (PVDD)

Part Number: TAS6424M-Q1

Tool/software:

Hello Audio team,

Similar to the question: TAS6424M-Q1: output power vs vbatt input range - Audio forum - Audio - TI E2E support forums

I am testing the device TAS6424M-Q1 and I am not able to get the output power according to the Figure 10 defined in the datasheet.


The maximum output power I am getting is approximately 12W with the followings configurations:

PVDD: 14.4V
Speaker load: 4ohms.
Fsw: 2.1MHz.
Fs: 48KHz. Register 0x03 = 0x44.
Gain: 15V/FS, Register 0x01 = 0x31.
Channel volume 1:  Register 0x05 = 0xE5 (11 db, according to the steps of 0.5db) 
Not limit current.

I am looking get 20W at the output with PVDD 14.4V. (the input range for normal operation for the current application is 9V-16V).

Do you have any recommendation to get the 20W as output power?
I have been changing the volume channel register, but while it increase, signals are clipped, so I guess the distortion is happening.

Thanks!!

  • Hi Jesus

    The maximum output power I am getting is approximately 12W

    12W is only around 10V peak output. May I ask how do you calculate the output power? By using AP testing, or using oscilloscope to check the output voltage?

    There's maybe several possibility:

    1. It's possible your input digital audio signal is not full scale. Could use the Gain settings to verify. If use larger Gain like 21V/FS could increase the output, it means your input is too small.

    2. Your power supply has some limitation, can't provide enough current, will make the PVDD voltage drop at the peak of sinewave. You could use oscilloscope to check both PVDD and output to verify.

  • Hi Shadow He,

    To get the maximum output power I am using the oscilloscope as you said, measuring the diff voltage and the output current.

    Regarding the possibilities:

    1. I am using a 1KHz sinusoidal wave, but not sure if it is a full scale. I will validate your comment increasing the gain to 21V/FS.
    2. The external power supply seems is not limiting the output current to the system, I've already checked the PVDD voltage on the power pins and is not dropping.

    Do you have a tone/file (1KHz sinusoidal waveform) to test the device?

  • Hi Jesus

    Below is a full scale 1KHz. But you'll also need to take care your testing platform, when transferring USB into I2S, would it create any zoom into the audio signal?

    Also please provide your tested output voltage and current waveform, I could check if anything unusual.  

  • Hi,

    Thanks for sharing the .wav file. it was useful to test the device.,

    Attached the picture as reference:
    VBAT: 14.2V, Volume ch: CF,  0dbs, Gain 15V/FS, and output channel as BTL.

    VBAT: 14.2V, Volume ch: C1,  0dbs, Gain 15V/FS, and output channel as BTL.



    It was not possible to get the 20WRMS using a speaker (voice coil impedance 4ohms nominal) I guess because of the frequency response of the speaker... To get the output power according to the spec, it was necessary to use a 4ohms resistor load.. Could you confirm what kind of load is recommended to calibrate/test the device? I was checking the information in the datasheet but it only defines 4ohms but not the load type.

  • Hi Jesus

    VBAT: 14.2V, Volume ch: C1,  0dbs, Gain 15V/FS, and output channel as BTL.

    This results indeed have some problem. As you could see, the output only reach to 8Vpp, far from the Max output, which should be around 14Vpp. I would still think your testing system, which transfer audio .wav file  into I2S format signal, will give some depression on the amplitude.

    VBAT: 14.2V, Volume ch: CF,  0dbs, Gain 15V/FS, and output channel as BTL.

    This one also used Gain 15V/FS? The difference is ch:CF. Could you please help me understand what is the major difference with another one? This waveform looks good.

  • Hi,

    Both are using the same Gain 15V/FS, register 0x01 = 0x031.

    The differences between both plots is the volume configuration, the first plot you shared is writing in the register 0x07 = 0xC1, it means -7dbs and the second plot is 0x07 = 0xCF 0dbs (0x07 because I was using the CH3).

  • Hi Jesus

      Then the results looks good. For 0dB settings, you could get peak 14V from both OUTP and OUTM, so differential you could have 14V peak sinewave on the load. For 4ohm load,  no problem to reach 20W.

  • Hi Shadow He,

    I have some questions;

    Could you confirm what type load (speaker/resistors) is recommended to calibrate/test the device? 
    is there a way to confirm if the module is transferring the .wav file to I2S is attenuating or depressing the amplitude?
    Do you have some recommendation for algorithm to control the volume assuming CF is 0dbs (100%) and avoiding suddenly changes in the input voltage to have better fidelity sound? 

  • Hi Jesus

    Could you confirm what type load (speaker/resistors) is recommended to calibrate/test the device? 

    For general performance test, use a 4ohm resistor, could guarantee the results are stable.

    is there a way to confirm if the module is transferring the .wav file to I2S is attenuating or depressing the amplitude?

    Provide a larger PVDD, like 18V. Set internal Volume 0dB, and Analog Gain 15V/Fs. Then the full scale input, should have a 15V peak sinewave output. Check if you could have it.

    Do you have some recommendation for algorithm to control the volume assuming CF is 0dbs (100%) and avoiding suddenly changes in the input voltage to have better fidelity sound? 

    Try add smooth in MCU for the audio input suddenly change. Like for each of FSYNC cycle, limit the amplitude change to 0.1dB, and ramp to the target value.

  • Hello Shadow He,

    Could you please elaborate more in the comment:"Try add smooth in MCU for the audio input suddenly change. Like for each of FSYNC cycle, limit the amplitude change to 0.1dB, and ramp to the target value".?

  • Hi Jesus

    Sorry, I might misunderstand of your need. You are talking about the input voltage change, which is PVDD suddenly change, right?

    avoiding suddenly changes in the input voltage

    Could consider using the PVDD foldback control, when detecting PVDD change, use AGL (Automatic Gain Limiter) to change the audio signal level. In below link, chapter 16.9 have some introduction of AGL.

    https://www.ti.com/lit/an/slaa786a/slaa786a.pdf?ts=1740360538775&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTAS5825M

  • Hi Shadow He,

    Regarding to your question, yes, I was talking about suddenly changes on PVDD. I think is clear now. Thanks.

    I have another question,

    Assuming 20Wrms at 13.5V on PVDD (fixed input voltage) and the speaker register has been defined 0xCC as default gain (-1.5db).

    The application is looking the following:

    volume -> POUTrms

    100% -> 20Wrms

    75% ->15Wrms.

    50% -> 10Wrms

    25% ->5Wrms

    I performed some measurements using the 4ohms resistors changing the registers using steps of 0.5db according to the datasheet, but I think the change from 20Wrms to 10Wrms is to short and it makes sense because is not linear... To get 20Wrms I used the 0xCB and 0xC5 to get 10WRms (Approximately).

    Do you know if already exist a algorithm for this module?

    Do you know how we can control the gain of the speaker's registers to have the configuration desired?

  • Hi Jesus

    Sorry that our side doesn't have more detailed introduction, or open resources about it. 

    Some of on-line resources as below, not sure if helpful to you.

    https://www.mathworks.com/matlabcentral/fileexchange/11202-automatic-gain-control