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Original question:

TPA3128D2EVM: Voltage Swing Intervals

TPA3128D2EVM: Voltage Output Swings

AQB MC
Prodigy 30 points
Part Number: TPA3128D2EVM
Other Parts Discussed in Thread: TPA3118D2EVM, TPA3128D2

Tool/software:

Hi there,

Thanks very much for the responses to our previous question on this.

We are pretty close to completing a design based on the specs of this EVM.

Just to double-check, I'd appreciate if you could confirm the following:

Let OUTPR and OUTNR denote, respectively, the positive output and the negative output of the Right channel.

The voltage difference between OUTNR and OUTPR can change approximately between -VCC and +VCC. Is this correct?

If this is correct, is there a way to combine the Right and the Left channels to obtain an output swing between approximately -2VCC and +2VCC?

On a related note, PBTL configuration would increase the output current capacity but not the voltage swing intervals. Correct?

Thank you.

  • 0
    TI__Genius 9195 points

    Hello,

    Yes, you are correct on all accounts. Ignoring losses in the inductor and in the output FETS, the outputs won't be able to swing above PVCC or below GND. This means your differential output could swing from +PVCC to -PVCC (positive side at PVCC or negative side at PVCC) or a rms output voltage of PVCC/sqrt(2). PBTL is often used for lower impedance speakers which require a higher current rating. By putting two outputs in parallel, the current is split among two of the channels so that the total current the speaker receives is doubled. The voltage limit remains the same.

    Regards,

    Ramsey

  • 0 in reply to Ramsey Foote
    Prodigy 30 points

    Hi Ramsey,

    Thanks very much for your response.

    I have two quick follow-up questions:

    1. If we use a single-ended input signal for the amplifier, whose voltage changes between -Vin/2 and Vin/2, do we need to worry about applying a DC threshold to it?

    2. In the documentation, I have not seen any input sensitivity for the amplifier. By the input sensitivity, I mean a lowest threshold input level required excite the amplifier. Can I assume that the amplifier will work regardless of whether the input voltage level exceeds a certain sensitivity threshold or not?

    Best regards.

  • 0 in reply to AQB MC
    TI__Genius 9195 points

    Hello,

    If you use a single ended input, the device should have one input pin tied to ground through an ac coupling capacitor and the other input pin tied to the signal through an ac coupling capacitor. 

    Yes, the amplifier will work regardless of the input level is, though if the signal is too low then it may get buried in the noise floor of your audio source so the amp won't pick it up.

    Regards,

    Ramsey

  • 0 in reply to Ramsey Foote
    Prodigy 30 points

    Hi Ramsey,

    Thanks again for your input.

    We finally had a chance to test one of the TPA3128D2EVM modules we purchased on our bench today. We connected two separate bench supplies with each outputting 24VDC to PVCC and AVCC.

    Then we simply fed the single-ended sinusoid input between RIN+ and RIN-. We unfortunately couldn't measure anything other than noise at the amplifier output even though we changed the input volume all the way up to 100%. We made sure on the oscilloscope that there is indeed signal and power at the amplifier inputs. We adjusted the PLIMIT potentiometer but it didn't make a difference either.

    We did not change any of the default jumpers, simply followed the quick start guide.

    We are currently charging some Lio batteries and we'll give it a try with battery supply. However I'm not sure if it'll help.

    If you ran into situations like this before and if you could give us some feedback, that'd be much appreciated, as one of our project is based on the performance of this amplifier.

    Best regards.

  • 0 in reply to AQB MC
    Prodigy 30 points

    Further to my question, we first connected the oscilloscope on the RIGHT channel output terminals of the amplifier. Then we connected a 7.5 Ohm resistor across the terminals of the oscilloscope probes, and did not see any output in either case.

    Thank you.

  • 0 in reply to AQB MC
    TI__Genius 9195 points

    Hello,

    Are you able to send me a picture of the setup? This can help me verify all connections on the EVM.

    Regards,

    Ramsey

  • 0 in reply to Ramsey Foote
    Prodigy 30 points

    Sure, here it is. Please let me know if the picture is clear enough. Thank you.

  • 0 in reply to AQB MC
    TI__Genius 9195 points

    Looks like the AVCC select Jumper (J3) is not installed. Try to move the jumper such that it is between the center pin and the "J4" silk screen label.

    Regards,

    Ramsey

  • 0 in reply to Ramsey Foote
    Prodigy 30 points

    We made that change, but unfortunately nothing other than noise on the scope screen.

  • 0 in reply to AQB MC
    TI__Genius 9195 points

    Can you probe the power supplies to the device (Pin 17/18 or can be measured on the middle and "J2" labeled pin of J3) and make sure the device is getting power? In addition can you probe the fault test point and the analog input to the device (one of the pins on the GNDL+ jumper).

    Regards,

    Ramsey

  • 0 in reply to Ramsey Foote
    Prodigy 30 points

    Power supply was measured as 24V. When we tried the voltage difference between the FAULT (orange) pin and GND, smell started to come out soon after. The voltage difference between FAULT pin and GND seemed to change between a few hundreds of mV interval.

  • 0 in reply to AQB MC
    Prodigy 30 points

    To be clear, we were able to verify that the board received 24VDC supply. I am not sure whether our attempts to measure the FAULT voltage would lead to frying the board. Would it be possible that the board may have been defective right out of the box?

  • 0 in reply to AQB MC
    TI__Genius 9195 points

    EVMs are all tested before being packaged in the ESD bags and sent out so the board would not have been damaged out of the box. Were you ever able to probe the inputs?

    Regards,

    Ramsey

  • 0 in reply to Ramsey Foote
    Prodigy 30 points

    Hi Ramsey,

    We have another update, and this time it's better news.

    I will try to mention this in detail, hoping that it may benefit the community.

    We have a separate amp from TI (TPA3118D2EVM), which does not offer dual supply, and therefore less can go wrong.

    As our initial measurements with TPA3118D2EVM also did not return the expected results, I became suspicious that we might be running the amplifiers into some sort of short circuit protection in our setup.

    In different projects in the past, we realized that probes that come with some oscilloscopes may exhibit strange behaviour, forcing the amplifiers to short circuit protection mode. So we removed the negative probe from the Left Channel's negative output, and we did the measurements with only the positive probe from the scope connected to the Left Channel's positive output.

    This really made a difference, and we could at least see the amplified sinusoid we were hoping to see. Another thing that the community may benefit from is the fact that we ended up making these measurements with no load resistor. Therefore the output bandwidth of the amplifier was solely determined by the LC circuit on its output, which has a resonant frequency of 61 KHz. We were indeed seeing a nearly 36 dB gain (calculated as 20 log Gain) at 64 KHz. However, the gain dropped quite significantly at lower frequencies.

    We will continue the tests tomorrow with a resistor between LOUT+ and the oscilloscope's probe, where we will pick resistor values that resemble our typical loads.

    So Ramsey, I have two follow-up questions:

    1. One of our concerns is that the amplified sinusouid is riding on a large DC offset. Given our setup, if you have any insight on that, we'd appreciate that.

    2. Would it be safe to use a 10 to 20 Ohm resistor as the load in the setup that I mentioned (i.e. placing a 10 to 20 Ohm resistor between LOUT+ and the probe?

    P.S. What we fried before seems to have been the resistor that we used previously in our very first setup.

    Thank you very much.

  • 0 in reply to AQB MC
    TI__Genius 9195 points

    Hello,

    The DC you are seeing on the amplified sinusoid is because only one leg of the differential output is being looked at. Each output leg of these class-D amplifiers switches between 0 and the Power supply. The change in the PWM duty cycle is what contains the audio signal so when you filter out the switching you are left with the audio. You can think of a filter as a moving average. However, since the switching can go from 0 to VVCC, the audio signal on each leg can go from 0 to PVCC which means there will be a common mode (DC) voltage offset on each individual leg. When you then connect the two legs to the terminals of the speaker, the DC is matched on both sides so the speaker will not see any DC. In essence, the positive leg is Vcom + Vsig,p and the negative leg is Vcom + Vsig,n meaning the differential signal will be (Vcom + Vsig,p) - (Vcom + Vsig,n) = Vsig,p - Vsig,n. In amps that support single ended outputs, you will want a large DC blocking cap. The TPA3255 datasheet has a schematic in section 10.2.3 that shows this behavior.

    One thing worth noting about the LC filter is that when there is no load attached, the LC becomes under damped. This causes an increase in the gain at the resonance frequency. This LC Filter Designer tool and app note explain this behavior and best practices for LC filter design to avoid this. For testing with an LC filter, a dummy load should be attached between the two outputs. If your scope is causing a short circuit, then adding a high impedance between the scope and the signal can help.

    Regards,

    Ramsey

  • 0 in reply to Ramsey Foote
    Prodigy 30 points

    Ramsey,

    Thanks very much for further insight. We did the differential tests with a dummy resistor, and still observed some DC offset at the output. We, however, think that this may be due to the input signal coming into the PA having DC offset. We take that into consideration in our pre-amp design, which will have a large DC blocking capacitor connected in series to its output.

    Could you confirm that in this datasheet, and in other TI datasheets in general, the amplifier gain is calculated as 20 log (Vout/Vin)?

    Thank you.

  • 0 in reply to AQB MC
    TI__Genius 9195 points

    Hello,

    Yea, gain is calculated as 20 log(Vo/Vin).

    Regards,

    Ramsey 

  • 0 in reply to Ramsey Foote
    Prodigy 30 points

    Thanks Ramsey. We are moving forward with our system design. Another quick question if you don't mind: We understand from the data sheets that setting AVCC<PVCC may lead to idle power savings. Is this a recommended mode of operation? Or would you rather recommend us to set AVCC=PVCC?

    Also, if, for instance, we set AVCC=12VDC and PVCC=24VDC, then would that lead to any change in the output voltage swing intervals? I.e., would we still be able to get 0<=OUTPL<=24 and 0<=OUTNL<=-24?

    Best regards.

  • 0 in reply to AQB MC
    TI__Genius 9195 points

    Hello,

    On the TPA3128D2, having split rail saves power by having the analog circuitry operate at a lower voltage than PVCC so the losses in the internal LDO are lower. If the system you are designing needs every bit of efficiency that you can get or if you already have a ,lower voltage rail with some that can  be used, then split rail may worth doing. Since you are using a 24V PVCC, the AVCC pin should be supplied with greater than 6V (Section 9.1 of the datasheet). If your system level design is more dependent on cost or simplicity, then it is fine to tie AVCC and PVCC together as well. Regardless of if split rail is used or not, the output will have the same swing intervals.

    Regards,

    Ramsey