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PCM1809: Some questions

Part Number: PCM1809

Tool/software:

Hi team,

I have a few questions.

  1. In Figure 7-1, capacitors with and without polarity are written separately.
    Should I use polarized capacitors where it says polarized?
  2. I am aware that the capacitor capacity for the quick charge scheme function can only be set to a maximum of 1uF.
    If AC coupling is done with a capacitor larger than 1uF, will the quick charge scheme not work?
  3. Can I use Left-Justified?
    The datasheet describes the switching characteristics of LJ, but I think the Mode is TDM or I2S.
    If LJ can be used, is there anything we should pay attention to?
  4. Is the only difference between controller mode and target mode the clock configuration?
    Are there any advantages or disadvantages to using each?

Best Regards,
Ryu.

  • Hi Ryu,

    1. Polarized capacitors are not required for this design. The customer can use low ESR, ceramic capacitors to connect them in either direction

    2. By default the quick charge scheme is enabled to charge the AC coupling capacitors within 2.5ms. This feature is supported with larger coupling capacitors.

    3. PCM1809 only supports TDM and I2S format

    4. There are no advantages to slave mode vs controller mode as this mostly depends on the audio subsystem. PCM1809 can act as the master clock source and provide BCLK and FSYNC to other devices in the system (when supplied with an external MCLK in controller mode) or receive BCLK and FSYNC from the clock host for audio processing.

  • Hi Daveon,

    Thanks for the reply.
    Please tell me one additional point.
    Do you mean that the fast charge capacitor should be larger than 1μF?
    And if so, is there max limitation?

    Best Regards,
    Ryu.

  • The recommended value is 1uF, but if it is larger the charge time will not be 2.5ms and the HPF cutoff frequency will change